Searched refs:getBaseWithConstantOffset (Results 1 – 6 of 6) sorted by relevance
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUGlobalISelUtils.h | 23 getBaseWithConstantOffset(MachineRegisterInfo &MRI, Register Reg);
|
H A D | AMDGPUGlobalISelUtils.cpp | 17 AMDGPU::getBaseWithConstantOffset(MachineRegisterInfo &MRI, Register Reg) { in getBaseWithConstantOffset() function in AMDGPU
|
H A D | AMDGPURegisterBankInfo.cpp | 1356 AMDGPU::getBaseWithConstantOffset(*MRI, CombinedOffset); in setBufferOffsets() 1670 getBaseWithConstantOffset(MachineRegisterInfo &MRI, Register Reg) { in getBaseWithConstantOffset() function 1691 std::tie(BaseReg, ImmOffset) = getBaseWithConstantOffset(*B.getMRI(), in splitBufferOffsets() 2605 AMDGPU::getBaseWithConstantOffset(MRI, MI.getOperand(2).getReg()); in applyMappingImpl() 2736 AMDGPU::getBaseWithConstantOffset(MRI, MI.getOperand(3).getReg()); in applyMappingImpl()
|
H A D | AMDGPUInstructionSelector.cpp | 1361 AMDGPU::getBaseWithConstantOffset(*MRI, BaseOffset); in selectDSGWSIntrinsic() 2594 std::tie(IdxBaseReg, Offset) = AMDGPU::getBaseWithConstantOffset(MRI, IdxReg); in computeIndirectRegIndex()
|
H A D | AMDGPULegalizerInfo.cpp | 3541 AMDGPU::getBaseWithConstantOffset(MRI, OrigOffset); in splitBufferOffsets()
|
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 12719 static void getBaseWithConstantOffset(SDValue Loc, SDValue &Base, in getBaseWithConstantOffset() function 12727 getBaseWithConstantOffset(Loc.getOperand(0), Base, Offset, DAG); in getBaseWithConstantOffset() 12752 getBaseWithConstantOffset(Loc, Base1, Offset1, DAG); in isConsecutiveLSLoc() 12753 getBaseWithConstantOffset(BaseLoc, Base2, Offset2, DAG); in isConsecutiveLSLoc()
|