| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/M68k/ |
| H A D | M68kRegisterInfo.cpp | 153 if (MachineOperand::clobbersPhysReg(RegMask, getBaseRegister())) in getReservedRegs()
158 setBitVector(getBaseRegister()); in getReservedRegs()
184 BasePtr = (FIndex < 0 ? FramePtr : getBaseRegister()); in eliminateFrameIndex()
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| H A D | M68kRegisterInfo.h | 101 unsigned getBaseRegister() const { return BasePtr; } in getBaseRegister() function
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| H A D | M68kFrameLowering.cpp | 84 FrameReg = TRI->getBaseRegister(); in getFrameIndexReference()
490 unsigned BasePtr = TRI->getBaseRegister(); in emitPrologue()
802 SavedRegs.set(TRI->getBaseRegister()); in determineCalleeSaves()
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| H A D | M68kCollapseMOVEMPass.cpp | 222 Reg == TRI->getBaseRegister() || in ProcessMI()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/ |
| H A D | LanaiRegisterInfo.cpp | 60 Reserved.set(getBaseRegister()); in getReservedRegs()
156 FrameReg = getBaseRegister(); in eliminateFrameIndex()
261 Register LanaiRegisterInfo::getBaseRegister() const { return Lanai::R14; } in getBaseRegister() function in LanaiRegisterInfo
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| H A D | LanaiRegisterInfo.h | 44 Register getBaseRegister() const;
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| H A D | LanaiFrameLowering.cpp | 217 SavedRegs.reset(LRI->getBaseRegister()); in determineCalleeSaves()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86RegisterInfo.h | 139 Register getBaseRegister() const { return BasePtr; } in getBaseRegister() function
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| H A D | X86RegisterInfo.cpp | 563 if (MachineOperand::clobbersPhysReg(RegMask, getBaseRegister())) in getReservedRegs()
568 Register BasePtr = getX86SubSuperRegister(getBaseRegister(), 64); in getReservedRegs()
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| H A D | X86SelectionDAGInfo.cpp | 44 return llvm::is_contained(ClobberSet, TRI->getBaseRegister()); in isBaseRegConflictPossible()
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| H A D | X86FrameLowering.cpp | 1345 Register BasePtr = TRI->getBaseRegister(); in emitPrologue()
2203 FrameReg = IsFixed ? TRI->getFramePtr() : TRI->getBaseRegister(); in getFrameIndexReference()
2671 Register BasePtr = TRI->getBaseRegister(); in determineCalleeSaves()
3406 Register BasePtr = TRI->getBaseRegister(); in restoreWin32EHStackPointers()
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| H A D | X86ISelLowering.cpp | 25891 Reg = RegInfo->getBaseRegister(); in LowerINTRINSIC_WO_CHAIN()
33470 Register BasePtr = RegInfo->getBaseRegister(); in emitEHSjLjSetJmp()
33891 Register BP = RI.getBaseRegister(); in EmitSjLjDispatchBlock()
34249 assert(TRI->getBaseRegister() == X86::ESI && in EmitInstrWithCustomInserter()
34284 Register BasePtr = TRI->getBaseRegister(); in EmitInstrWithCustomInserter()
34315 Register BasePtr = TRI->getBaseRegister(); in EmitInstrWithCustomInserter()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64RegisterInfo.h | 121 unsigned getBaseRegister() const;
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| H A D | AArch64RegisterInfo.cpp | 382 unsigned AArch64RegisterInfo::getBaseRegister() const { return AArch64::X19; } in getBaseRegister() function in AArch64RegisterInfo
776 return getBaseRegister(); in getLocalAddressRegister()
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| H A D | AArch64FrameLowering.cpp | 1478 TII->copyPhysReg(MBB, MBBI, DL, RegInfo->getBaseRegister(), AArch64::SP, in emitPrologue()
2113 FrameReg = RegInfo->hasBasePointer(MF) ? RegInfo->getBaseRegister() in resolveFrameOffsetReference()
2131 FrameReg = RegInfo->getBaseRegister(); in resolveFrameOffsetReference()
2746 ? RegInfo->getBaseRegister() in determineCalleeSaves()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMBaseRegisterInfo.h | 182 Register getBaseRegister() const { return BasePtr; } in getBaseRegister() function
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| H A D | ARMFrameLowering.cpp | 843 BuildMI(MBB, MBBI, dl, TII.get(ARM::MOVr), RegInfo->getBaseRegister()) in emitPrologue()
848 BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr), RegInfo->getBaseRegister()) in emitPrologue()
1015 FrameReg = RegInfo->getBaseRegister(); in ResolveFrameIndexReference()
1063 FrameReg = RegInfo->getBaseRegister(); in ResolveFrameIndexReference()
1820 SavedRegs.set(RegInfo->getBaseRegister()); in determineCalleeSaves()
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| H A D | Thumb1FrameLowering.cpp | 170 unsigned BasePtr = RegInfo->getBaseRegister(); in emitPrologue()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCRegisterInfo.h | 148 Register getBaseRegister(const MachineFunction &MF) const;
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| H A D | PPCFrameLowering.cpp | 391 unsigned BPReg = HasBP ? (unsigned) RegInfo->getBaseRegister(MF) : FPReg; in replaceFPWithRealFP()
649 Register BPReg = RegInfo->getBaseRegister(MF); in emitPrologue()
1263 Register BPReg = RegInfo->getBaseRegister(MF); in inlineStackProbe()
1562 Register BPReg = RegInfo->getBaseRegister(MF); in emitEpilogue()
2011 SavedRegs.reset(RegInfo->getBaseRegister(MF)); in determineCalleeSaves()
2176 Register BP = RegInfo->getBaseRegister(MF); in processFunctionBeforeFrameFinalized()
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| H A D | PPCRegisterInfo.cpp | 1276 FrameIndex < 0 ? getBaseRegister(MF) : getFrameRegister(MF), false); in eliminateFrameIndex()
1372 Register PPCRegisterInfo::getBaseRegister(const MachineFunction &MF) const { in getBaseRegister() function in PPCRegisterInfo
1442 return !isFrameOffsetLegal(MI, getBaseRegister(MF), Offset); in needsFrameBaseReg()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | SIRegisterInfo.h | 82 Register getBaseRegister() const;
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| H A D | SIFrameLowering.cpp | 739 TRI.hasBasePointer(MF) ? TRI.getBaseRegister() : Register(); in emitPrologue()
984 TRI.hasBasePointer(MF) ? TRI.getBaseRegister() : Register(); in emitEpilogue()
1251 Register BasePtrReg = RI->getBaseRegister(); in assignCalleeSavedSpillSlots()
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| H A D | SIRegisterInfo.cpp | 409 Register SIRegisterInfo::getBaseRegister() const { return AMDGPU::SGPR34; } in getBaseRegister() function in SIRegisterInfo
566 MCRegister BasePtrReg = getBaseRegister(); in getReservedRegs()
1280 ? getBaseRegister() in buildVGPRSpillLoadStore()
1514 ? getBaseRegister() in eliminateFrameIndex()
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