Searched refs:enable_post_div (Results 1 – 8 of 8) sorted by relevance
68 if (dividers.enable_post_div) in rv730_populate_sclk_value()79 if (dividers.enable_post_div) in rv730_populate_sclk_value()146 if (dividers.enable_post_div) in rv730_populate_mclk_value()153 if (dividers.enable_post_div) in rv730_populate_mclk_value()
2858 dividers->enable_post_div = true; in radeon_atom_get_clock_dividers()2874 dividers->enable_post_div = (le32_to_cpu(args.v2.ulClock) & (1 << 24)) ? in radeon_atom_get_clock_dividers()2878 dividers->enable_post_div = (dividers->fb_div & 1) ? true : false; in radeon_atom_get_clock_dividers()2886 dividers->enable_post_div = (args.v3.ucCntlFlag & in radeon_atom_get_clock_dividers()2906 dividers->enable_post_div = (args.v5.ucCntlFlag & in radeon_atom_get_clock_dividers()
597 bool enable_post_div; member
154 if (dividers.enable_post_div) in rv6xx_convert_clock_to_stepping()615 if (dividers.enable_post_div) in rv6xx_program_mclk_stepping_entry()
96 if (dividers.enable_post_div) in rs780_initialize_dpm_power_state()
517 if (dividers.enable_post_div) in rv770_populate_sclk_value()526 if (dividers.enable_post_div) in rv770_populate_sclk_value()
46 bool enable_post_div; member
1031 dividers->enable_post_div = (args.v3.ucCntlFlag & in amdgpu_atombios_get_clock_dividers()1051 dividers->enable_post_div = (args.v5.ucCntlFlag & in amdgpu_atombios_get_clock_dividers()