Searched refs:emitStoreConditional (Results 1 – 9 of 9) sorted by relevance
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.h | 328 Value *emitStoreConditional(IRBuilder<> &Builder, Value *Val,
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| H A D | HexagonISelLowering.cpp | 3579 Value *HexagonTargetLowering::emitStoreConditional(IRBuilder<> &Builder, in emitStoreConditional() function in HexagonTargetLowering
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | AtomicExpandPass.cpp | 1072 TLI->emitStoreConditional(Builder, NewVal, Addr, MemOpOrder); in insertRMWLLSCLoop()
1256 TLI->emitStoreConditional(Builder, NewValueInsert, PMV.AlignedAddr, in expandAtomicCmpXchg()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.h | 630 Value *emitStoreConditional(IRBuilder<> &Builder, Value *Val,
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| H A D | ARMISelLowering.cpp | 19531 Value *ARMTargetLowering::emitStoreConditional(IRBuilder<> &Builder, Value *Val, in emitStoreConditional() function in ARMTargetLowering
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.h | 654 Value *emitStoreConditional(IRBuilder<> &Builder, Value *Val,
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| H A D | AArch64ISelLowering.cpp | 16946 Value *AArch64TargetLowering::emitStoreConditional(IRBuilder<> &Builder, in emitStoreConditional() function in AArch64TargetLowering
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| /netbsd-src/external/apache2/llvm/dist/llvm/docs/ |
| H A D | Atomics.rst | 457 ``emitStoreConditional()``
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | TargetLowering.h | 1872 virtual Value *emitStoreConditional(IRBuilder<> &Builder, Value *Val, in emitStoreConditional() function
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