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/netbsd-src/external/gpl3/gdb/dist/sim/testsuite/h8300/
H A Dmovsd.s15 dst1: .byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 label
26 mov #dst1, er6
43 test_h_gr32 dst1+4 er6
48 cmp.b @src, @dst1
50 cmp.b @src+1, @dst1+1
52 cmp.b @src+2, @dst1+2
54 cmp.b @src+3, @dst1+3
56 cmp.b @src+4, @dst1+4
/netbsd-src/external/gpl3/gdb/dist/sim/testsuite/bfin/
H A Dbyteunpack.s13 .macro _bu_chk_test dst0:req, dst1:req
15 imm32 R3, \dst1
21 .macro bu_test i0:req, dst0:req, dst1:req, src0:req, src1:req
24 _bu_chk_test \dst0, \dst1
26 .macro bu_r_test i0:req, dst0:req, dst1:req, src0:req, src1:req
29 _bu_chk_test \dst0, \dst1
/netbsd-src/lib/libc/net/
H A Dgetaddrinfo.c983 const struct ai_order *dst1 = arg1, *dst2 = arg2; in comp_dst() local
989 if (dst1->aio_srcsa.sa_family != AF_UNSPEC && in comp_dst()
993 if (dst1->aio_srcsa.sa_family == AF_UNSPEC && in comp_dst()
999 if (dst1->aio_dstscope == dst1->aio_srcscope && in comp_dst()
1003 if (dst1->aio_dstscope != dst1->aio_srcscope && in comp_dst()
1009 if (dst1->aio_srcsa.sa_family != AF_UNSPEC && in comp_dst()
1011 if (!(dst1->aio_srcflag & AIO_SRCFLAG_DEPRECATED) && in comp_dst()
1015 if ((dst1->aio_srcflag & AIO_SRCFLAG_DEPRECATED) && in comp_dst()
1026 if (dst1->aio_srcpolicy && dst1->aio_dstpolicy && in comp_dst()
1027 dst1->aio_srcpolicy->pc_policy.label == in comp_dst()
[all …]
/netbsd-src/sys/arch/luna68k/dev/
H A Domrasops.c830 uint8_t *dst1, *dst2, *dst3; in om4_rascopy_multi() local
854 dst1 = dst0 + OMFB_PLANEOFFS; in om4_rascopy_multi()
855 dst2 = dst1 + OMFB_PLANEOFFS; in om4_rascopy_multi()
886 " move.l (%[src0]),(%[dst1])+ ;\n" /* P1 */ in om4_rascopy_multi()
898 " move.l (%[src0]),(%[dst1])+ ;\n" /* P1 */ in om4_rascopy_multi()
905 " adda.l %[step8],%[dst1] ;\n" in om4_rascopy_multi()
912 [dst1] "+&a" (dst1), in om4_rascopy_multi()
931 *(uint32_t *)dst1 = *(uint32_t *)src0; in om4_rascopy_multi()
932 dst1 in om4_rascopy_multi()
[all...]
/netbsd-src/crypto/external/bsd/heimdal/dist/lib/krb5/
H A Dn-fold.c38 rr13(uint8_t *dst1, uint8_t *dst2, uint8_t *src, size_t len) in rr13() argument
61 dst1[i] = (src[b1] << s1) | (src[b2] >> s2); in rr13()
62 dst2[i] = dst1[i]; in rr13()
/netbsd-src/usr.sbin/rbootd/
H A Drmpproto.c293 char *src, *dst1, *dst2; in SendBootRepl() local
320 dst1 = filepath; in SendBootRepl()
330 *dst1++ = *dst2++ = *src++; in SendBootRepl()
331 *dst1 = '\0'; in SendBootRepl()
/netbsd-src/external/gpl3/binutils.old/dist/gas/config/
H A Dtc-bfin.c1235 REG_T dst0, REG_T dst1, REG_T src0, REG_T src1) in bfin_gen_dsp32alu() argument
1245 ASSIGN_R (dst1); in bfin_gen_dsp32alu()
2359 int dst1 = ((iw1 >> DSP32Alu_dst1_bits) & DSP32Alu_dst1_mask); in decode_dsp32alu_0() local
2422 return DREG_MASK (dst0) | DREG_MASK (dst1); in decode_dsp32alu_0()
2429 return DREG_MASK (dst0) | DREG_MASK (dst1); in decode_dsp32alu_0()
2439 return DREG_MASK (dst0) | DREG_MASK (dst1); in decode_dsp32alu_0()
2442 return DREG_MASK (dst0) | DREG_MASK (dst1); in decode_dsp32alu_0()
2444 return DREG_MASK (dst0) | DREG_MASK (dst1); in decode_dsp32alu_0()
2457 return DREG_MASK (dst0) | DREG_MASK (dst1); in decode_dsp32alu_0()
2467 return DREG_MASK (dst0) | DREG_MASK (dst1); in decode_dsp32alu_0()
[all …]
/netbsd-src/external/gpl3/binutils/dist/gas/config/
H A Dtc-bfin.c1224 REG_T dst0, REG_T dst1, REG_T src0, REG_T src1) in bfin_gen_dsp32alu() argument
1234 ASSIGN_R (dst1); in bfin_gen_dsp32alu()
2348 int dst1 = ((iw1 >> DSP32Alu_dst1_bits) & DSP32Alu_dst1_mask); in decode_dsp32alu_0() local
2411 return DREG_MASK (dst0) | DREG_MASK (dst1); in decode_dsp32alu_0()
2418 return DREG_MASK (dst0) | DREG_MASK (dst1); in decode_dsp32alu_0()
2428 return DREG_MASK (dst0) | DREG_MASK (dst1); in decode_dsp32alu_0()
2431 return DREG_MASK (dst0) | DREG_MASK (dst1); in decode_dsp32alu_0()
2433 return DREG_MASK (dst0) | DREG_MASK (dst1); in decode_dsp32alu_0()
2446 return DREG_MASK (dst0) | DREG_MASK (dst1); in decode_dsp32alu_0()
2456 return DREG_MASK (dst0) | DREG_MASK (dst1); in decode_dsp32alu_0()
[all …]
/netbsd-src/external/gpl3/gcc.old/dist/libphobos/src/std/datetime/
H A Dsystime.d9682 immutable dst1 = DateTime(1976, 7, 4, 5, 4, 22); variable
9690 test("04 Jul 1976 05:04:22 +0000", SysTime(dst1, UTC()));
9693 test("Sun, 04 Jul 1976 05:04:22 +0000", SysTime(dst1, UTC()));
9695 test("4 Jul 1976 05:04:22 +0000", SysTime(dst1, UTC()));
9698 test("Sun, 4 Jul 1976 05:04:22 +0000", SysTime(dst1, UTC()));
9706 test("04 Jul 1976 05:04:22 -0000", SysTime(dst1, badTZ));
9709 test("Sun, 04 Jul 1976 05:04:22 -0000", SysTime(dst1, badTZ));
9711 test("4 Jul 1976 05:04:22 -0000", SysTime(dst1, badTZ));
9714 test("Sun, 4 Jul 1976 05:04:22 -0000", SysTime(dst1, badTZ));
9723 test("04 Jul 1976 05:04:22 -0700", SysTime(dst1, pdt));
[all …]
/netbsd-src/external/gpl3/gcc/dist/libphobos/src/std/datetime/
H A Dsystime.d10614 immutable dst1 = DateTime(1976, 7, 4, 5, 4, 22); variable
10622 test("04 Jul 1976 05:04:22 +0000", SysTime(dst1, UTC()));
10625 test("Sun, 04 Jul 1976 05:04:22 +0000", SysTime(dst1, UTC()));
10627 test("4 Jul 1976 05:04:22 +0000", SysTime(dst1, UTC()));
10630 test("Sun, 4 Jul 1976 05:04:22 +0000", SysTime(dst1, UTC()));
10638 test("04 Jul 1976 05:04:22 -0000", SysTime(dst1, badTZ));
10641 test("Sun, 04 Jul 1976 05:04:22 -0000", SysTime(dst1, badTZ));
10643 test("4 Jul 1976 05:04:22 -0000", SysTime(dst1, badTZ));
10646 test("Sun, 4 Jul 1976 05:04:22 -0000", SysTime(dst1, badTZ));
10655 test("04 Jul 1976 05:04:22 -0700", SysTime(dst1, pdt));
[all …]
/netbsd-src/tests/net/route/
H A Dt_rtcache.sh34 BUS_DST1=./dst1
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/NVPTX/
H A DNVPTXInstrInfo.td2393 (outs regclass:$dst1, regclass:$dst2),
2397 "\t{{$dst1, $dst2}}, [$addr];", []>;
2399 (outs regclass:$dst1, regclass:$dst2),
2403 "\t{{$dst1, $dst2}}, [$addr];", []>;
2405 (outs regclass:$dst1, regclass:$dst2),
2409 "\t{{$dst1, $dst2}}, [$addr];", []>;
2411 (outs regclass:$dst1, regclass:$dst2),
2415 "\t{{$dst1, $dst2}}, [$addr+$offset];", []>;
2417 (outs regclass:$dst1, regclass:$dst2),
2421 "\t{{$dst1, $dst2}}, [$addr+$offset];", []>;
[all …]
H A DNVPTXIntrinsics.td1929 def _areg32: NVPTXInst<(outs regclass:$dst1, regclass:$dst2),
1932 def _areg64: NVPTXInst<(outs regclass:$dst1, regclass:$dst2),
1935 def _ari32: NVPTXInst<(outs regclass:$dst1, regclass:$dst2),
1938 def _ari64: NVPTXInst<(outs regclass:$dst1, regclass:$dst2),
1941 def _avar: NVPTXInst<(outs regclass:$dst1, regclass:$dst2),
1947 def _areg32: NVPTXInst<(outs regclass:$dst1, regclass:$dst2, regclass:$dst3,
1950 def _areg64: NVPTXInst<(outs regclass:$dst1, regclass:$dst2, regclass:$dst3,
1953 def _ari32: NVPTXInst<(outs regclass:$dst1, regclass:$dst2, regclass:$dst3,
1956 def _ari64: NVPTXInst<(outs regclass:$dst1, regclass:$dst2, regclass:$dst3,
1959 def _avar: NVPTXInst<(outs regclass:$dst1, regclass:$dst2, regclass:$dst3,
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/XCore/
H A DXCoreInstrInfo.td511 def LADD_l5r : _FL5R<0b000001, (outs GRRegs:$dst1, GRRegs:$dst2),
513 "ladd $dst2, $dst1, $src1, $src2, $src3",
516 def LSUB_l5r : _FL5R<0b000010, (outs GRRegs:$dst1, GRRegs:$dst2),
518 "lsub $dst2, $dst1, $src1, $src2, $src3", []>;
520 def LDIVU_l5r : _FL5R<0b000000, (outs GRRegs:$dst1, GRRegs:$dst2),
522 "ldivu $dst1, $dst2, $src3, $src1, $src2", []>;
527 0b00000, (outs GRRegs:$dst1, GRRegs:$dst2),
529 "lmul $dst1, $dst2, $src1, $src2, $src3, $src4", []>;
/netbsd-src/sys/dev/scsipi/
H A Dch.c630 u_int16_t src, dst1, dst2; in ch_exchange() local
656 dst1 = sc->sc_firsts[ce->ce_fdsttype] + ce->ce_fdstunit; in ch_exchange()
666 _lto2b(dst1, cmd.fdst); in ch_exchange()
/netbsd-src/external/gpl3/binutils.old/dist/opcodes/
H A Dbfin-dis.c3086 int dst1 = ((iw1 >> DSP32Alu_dst1_bits) & DSP32Alu_dst1_mask); in decode_dsp32alu_0() local
3584 OUTS (outf, dregs (dst1)); in decode_dsp32alu_0()
3591 OUTS (outf, dregs (dst1)); in decode_dsp32alu_0()
3606 OUTS (outf, dregs (dst1)); in decode_dsp32alu_0()
3663 OUTS (outf, dregs (dst1)); in decode_dsp32alu_0()
3671 OUTS (outf, dregs (dst1)); in decode_dsp32alu_0()
3727 OUTS (outf, dregs (dst1)); in decode_dsp32alu_0()
3744 OUTS (outf, dregs (dst1)); in decode_dsp32alu_0()
3809 OUTS (outf, dregs (dst1)); in decode_dsp32alu_0()
3852 OUTS (outf, dregs (dst1)); in decode_dsp32alu_0()
[all …]
/netbsd-src/external/gpl3/binutils/dist/opcodes/
H A Dbfin-dis.c3086 int dst1 = ((iw1 >> DSP32Alu_dst1_bits) & DSP32Alu_dst1_mask); in decode_dsp32alu_0() local
3584 OUTS (outf, dregs (dst1)); in decode_dsp32alu_0()
3591 OUTS (outf, dregs (dst1)); in decode_dsp32alu_0()
3606 OUTS (outf, dregs (dst1)); in decode_dsp32alu_0()
3663 OUTS (outf, dregs (dst1)); in decode_dsp32alu_0()
3671 OUTS (outf, dregs (dst1)); in decode_dsp32alu_0()
3727 OUTS (outf, dregs (dst1)); in decode_dsp32alu_0()
3744 OUTS (outf, dregs (dst1)); in decode_dsp32alu_0()
3809 OUTS (outf, dregs (dst1)); in decode_dsp32alu_0()
3852 OUTS (outf, dregs (dst1)); in decode_dsp32alu_0()
[all …]
/netbsd-src/external/gpl3/autoconf/dist/tests/
H A Dtools.at835 AC_LINK_FILES(dst1 dst2, src1 src2)
839 AT_DATA([dst1], dst1
848 AT_CHECK([cat src1], 0, [dst1
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
H A DRISCVInstrInfoD.td320 : Pseudo<(outs GPR:$dst1, GPR:$dst2), (ins FPR64:$src),
321 [(set GPR:$dst1, GPR:$dst2, (RISCVSplitF64 FPR64:$src))]>;
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DR600Instructions.td383 (outs R600_TReg32_X:$dst0, R600_TReg32_Y:$dst1),
385 "INTERP_PAIR_XY $src0 $src1 $src2 : $dst0 dst1",
389 (outs R600_TReg32_Z:$dst0, R600_TReg32_W:$dst1),
391 "INTERP_PAIR_ZW $src0 $src1 $src2 : $dst0 dst1",
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86InstrArithmetic.td1476 def rr : I<0xF6, MRMSrcReg, (outs RC:$dst1, RC:$dst2), (ins RC:$src),
1477 !strconcat(mnemonic, "\t{$src, $dst2, $dst1|$dst1, $dst2, $src}"),
1481 def rm : I<0xF6, MRMSrcMem, (outs RC:$dst1, RC:$dst2), (ins x86memop:$src),
1482 !strconcat(mnemonic, "\t{$src, $dst2, $dst1|$dst1, $dst2, $src}"),
H A DX86InstrInfo.td2123 let Constraints = "$src1 = $dst1, $src2 = $dst2", hasSideEffects = 0 in {
2124 def XCHG8rr : I<0x86, MRMSrcReg, (outs GR8:$dst1, GR8:$dst2),
2127 def XCHG16rr : I<0x87, MRMSrcReg, (outs GR16:$dst1, GR16:$dst2),
2131 def XCHG32rr : I<0x87, MRMSrcReg, (outs GR32:$dst1, GR32:$dst2),
2135 def XCHG64rr : RI<0x87, MRMSrcReg, (outs GR64:$dst1, GR64:$dst2),
2154 let hasSideEffects = 0, Constraints = "$src1 = $dst1, $src2 = $dst2",
2156 def XADD8rr : I<0xC0, MRMDestReg, (outs GR8:$dst1, GR8:$dst2),
2159 def XADD16rr : I<0xC1, MRMDestReg, (outs GR16:$dst1, GR16:$dst2),
2162 def XADD32rr : I<0xC1, MRMDestReg, (outs GR32:$dst1, GR32:$dst2),
2165 def XADD64rr : RI<0xC1, MRMDestReg, (outs GR64:$dst1, GR64:$dst2),
/netbsd-src/external/gpl3/gcc.old/dist/gcc/config/spu/
H A Dspu.c581 rtx dst1 = gen_reg_rtx (TImode); in spu_expand_insv() local
589 emit_move_insn (dst1, mem1); in spu_expand_insv()
590 emit_insn (gen_selb (dst1, dst1, shift_reg, mask1)); in spu_expand_insv()
591 emit_move_insn (mem1, dst1); in spu_expand_insv()
4546 spu_expand_load (rtx dst0, rtx dst1, rtx src, int extra_rotby) in spu_expand_load() argument
4675 if (dst1) in spu_expand_load()
4679 emit_insn (gen__movti (dst1, change_address (src, TImode, addr1))); in spu_expand_load()
/netbsd-src/external/gpl3/gcc/dist/gcc/config/nvptx/
H A Dnvptx.cc1934 nvptx_gen_unpack (rtx dst0, rtx dst1, rtx src) in nvptx_gen_unpack() argument
1941 res = gen_unpackdisi2 (dst0, dst1, src); in nvptx_gen_unpack()
1944 res = gen_unpackdfsi2 (dst0, dst1, src); in nvptx_gen_unpack()
2025 rtx dst1 = gen_rtx_SUBREG (SImode, dst, 4); in nvptx_gen_shuffle() local
2034 emit_insn (gen_movsi (dst1, tmp1)); in nvptx_gen_shuffle()
2044 rtx dst1 = gen_rtx_SUBREG (DImode, dst, 8); in nvptx_gen_shuffle() local
2053 emit_insn (gen_movdi (dst1, tmp1)); in nvptx_gen_shuffle()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
H A DMipsCondMov.td303 PseudoSE<(outs RC:$dst1, RC:$dst2),

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