Searched refs:dsc_mode (Results 1 – 6 of 6) sorted by relevance
| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/ |
| H A D | amdgpu_dcn20_stream_encoder.c | 281 enum optc_dsc_mode dsc_mode, in enc2_dp_set_dsc_config() argument
288 DP_DSC_MODE, dsc_mode, in enc2_dp_set_dsc_config()
355 REG_GET(DP_DSC_CNTL, DP_DSC_MODE, &s->dsc_mode); in enc2_read_state()
356 if (s->dsc_mode) { in enc2_read_state()
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| H A D | amdgpu_dcn20_optc.c | 198 enum optc_dsc_mode dsc_mode, in optc2_set_dsc_config() argument
205 OPTC_DSC_MODE, dsc_mode); in optc2_set_dsc_config()
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| H A D | dcn20_optc.h | 92 enum optc_dsc_mode dsc_mode,
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/hw/ |
| H A D | stream_encoder.h | 111 uint32_t dsc_mode; // DISABLED 0; 1 or 2 indicate enabled state. member
223 enum optc_dsc_mode dsc_mode,
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| H A D | timing_generator.h | 270 enum optc_dsc_mode dsc_mode,
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/ |
| H A D | amdgpu_dcn10_hw_sequencer.c | 421 s.dsc_mode, in dcn10_log_hw_state()
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