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Searched refs:dpp_inst (Results 1 – 11 of 11) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/
H A Damdgpu_dcn20_dccg.c52 void dccg2_update_dpp_dto(struct dccg *dccg, int dpp_inst, int req_dppclk) in dccg2_update_dpp_dto() argument
69 REG_SET_2(DPPCLK_DTO_PARAM[dpp_inst], 0, in dccg2_update_dpp_dto()
73 DPPCLK_DTO_ENABLE[dpp_inst], 1); in dccg2_update_dpp_dto()
76 DPPCLK_DTO_ENABLE[dpp_inst], 0); in dccg2_update_dpp_dto()
H A Ddcn20_dccg.h102 void dccg2_update_dpp_dto(struct dccg *dccg, int dpp_inst, int req_dppclk);
H A Ddcn20_hwseq.h97 unsigned int dpp_inst,
H A Damdgpu_dcn20_hwseq.c410 unsigned int dpp_inst, in dcn20_dpp_pg_control() argument
421 switch (dpp_inst) { in dcn20_dpp_pg_control()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
H A Ddmub_psr.c151 copy_settings_data->dpp_inst = pipe_ctx->plane_res.dpp->inst; in dmub_setup_psr()
153 copy_settings_data->dpp_inst = 0; in dmub_setup_psr()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/hw/
H A Ddccg.h42 int dpp_inst,
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dcn20/
H A Damdgpu_dcn20_clk_mgr.c115 int dpp_inst, dppclk_khz, prev_dppclk_khz; in dcn20_update_clocks_update_dpp_dto() local
120 dpp_inst = i; in dcn20_update_clocks_update_dpp_dto()
127 clk_mgr->dccg, dpp_inst, dppclk_khz); in dcn20_update_clocks_update_dpp_dto()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/
H A Dhw_sequencer_private.h115 unsigned int dpp_inst,
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dmub/inc/
H A Ddmub_cmd.h222 uint8_t dpp_inst; member
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
H A Ddcn10_hw_sequencer.h86 unsigned int dpp_inst,
H A Damdgpu_dcn10_hw_sequencer.c540 unsigned int dpp_inst, in dcn10_dpp_pg_control() argument
551 switch (dpp_inst) { in dcn10_dpp_pg_control()