| /netbsd-src/sys/dev/fdt/ |
| H A D | display_timing.h | 32 struct display_timing { struct
45 int display_timing_parse(int, struct display_timing *); argument
|
| H A D | panel_fdt.h | 61 struct display_timing panel_timing;
|
| H A D | display_timing.c | 45 display_timing_parse(int phandle, struct display_timing *timing) in display_timing_parse()
|
| H A D | panel_fdt.c | 91 const struct display_timing * const timing = in fdt_panel_attach()
|
| H A D | files.fdt | 131 file dev/fdt/display_timing.c fdt_display_timing
|
| /netbsd-src/sys/external/bsd/drm2/dist/include/drm/ |
| H A D | drm_panel.h | 38 struct display_timing;
127 struct display_timing *timings);
|
| /netbsd-src/sys/arch/arm/fdt/ |
| H A D | plfb_fdt.c | 255 plfb_get_panel_timing(struct plfb_softc *sc, struct display_timing *timing) in plfb_get_panel_timing()
273 struct display_timing timing; in plfb_init()
|
| /netbsd-src/sys/dev/pci/ |
| H A D | unichromereg.h | 696 struct display_timing { struct
716 struct display_timing crtc; argument
|
| H A D | unichromefb.c | 167 static void uni_load_crtc(struct unichromefb_softc *, struct display_timing,
746 struct display_timing crtreg; in uni_set_crtc()
807 struct display_timing device_timing, int iga) in uni_load_crtc()
|
| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/ |
| H A D | smu7_hwmgr.h | 292 struct smu7_display_timing display_timing; member
|
| H A D | vega12_hwmgr.h | 349 struct vega12_display_timing display_timing; member
|
| H A D | vega10_hwmgr.h | 346 struct vega10_display_timing display_timing; member
|
| H A D | vega20_hwmgr.h | 473 struct vega20_display_timing display_timing; member
|
| H A D | amdgpu_smu7_hwmgr.c | 3629 if (data->display_timing.min_clock_in_sr != min_clocks.engineClockInSR && in smu7_find_dpm_states_clocks_in_dpm_table()
3631 data->display_timing.min_clock_in_sr >= SMU7_MINIMUM_ENGINE_CLOCK)) in smu7_find_dpm_states_clocks_in_dpm_table()
3647 if (data->display_timing.num_existing_displays != hwmgr->display_config->num_display) in smu7_find_dpm_states_clocks_in_dpm_table()
4181 if (data->display_timing.num_existing_displays != hwmgr->display_config->num_display) in smu7_check_smc_update_required_for_display_configuration()
4184 if (data->display_timing.vrefresh != hwmgr->display_config->vrefresh) in smu7_check_smc_update_required_for_display_configuration()
4188 if (data->display_timing.min_clock_in_sr != hwmgr->display_config->min_core_set_clock_in_sr && in smu7_check_smc_update_required_for_display_configuration()
4189 (data->display_timing.min_clock_in_sr >= SMU7_MINIMUM_ENGINE_CLOCK || in smu7_check_smc_update_required_for_display_configuration()
|
| H A D | amdgpu_vega12_hwmgr.c | 2443 if (data->display_timing.num_existing_displays != hwmgr->display_config->num_display) in vega12_check_smc_update_required_for_display_configuration()
2447 if (data->display_timing.min_clock_in_sr != hwmgr->display_config->min_core_set_clock_in_sr) in vega12_check_smc_update_required_for_display_configuration()
|
| H A D | amdgpu_vega10_hwmgr.c | 3361 if (data->display_timing.num_existing_displays != hwmgr->display_config->num_display) in vega10_find_dpm_states_clocks_in_dpm_table()
4755 if (data->display_timing.num_existing_displays != hwmgr->display_config->num_display) in vega10_check_smc_update_required_for_display_configuration()
4759 if (data->display_timing.min_clock_in_sr != hwmgr->display_config->min_core_set_clock_in_sr) in vega10_check_smc_update_required_for_display_configuration()
|
| H A D | amdgpu_vega20_hwmgr.c | 3822 if (data->display_timing.num_existing_displays != in vega20_check_smc_update_required_for_display_configuration()
3827 (data->display_timing.min_clock_in_sr != in vega20_check_smc_update_required_for_display_configuration()
|
| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/ |
| H A D | amdgpu_tonga_smumgr.c | 663 data->display_timing.min_clock_in_sr = in tonga_populate_single_graphic_level()
670 data->display_timing.min_clock_in_sr); in tonga_populate_single_graphic_level()
1021 data->display_timing.num_existing_displays = hwmgr->display_config->num_display; in tonga_populate_single_memory_level()
1022 data->display_timing.vrefresh = hwmgr->display_config->vrefresh; in tonga_populate_single_memory_level()
1028 && (data->display_timing.num_existing_displays <= 2) in tonga_populate_single_memory_level()
1029 && (data->display_timing.num_existing_displays != 0)) in tonga_populate_single_memory_level()
|
| H A D | amdgpu_iceland_smumgr.c | 936 data->display_timing.min_clock_in_sr = in iceland_populate_single_graphic_level()
943 data->display_timing.min_clock_in_sr); in iceland_populate_single_graphic_level()
1287 data->display_timing.num_existing_displays = hwmgr->display_config->num_display; in iceland_populate_single_memory_level()
1288 data->display_timing.vrefresh = hwmgr->display_config->vrefresh; in iceland_populate_single_memory_level()
|
| H A D | amdgpu_vegam_smumgr.c | 841 data->display_timing.min_clock_in_sr = hwmgr->display_config->min_core_set_clock_in_sr; in vegam_populate_single_graphic_level()
1015 data->display_timing.num_existing_displays = hwmgr->display_config->num_display; in vegam_populate_single_memory_level()
1016 data->display_timing.vrefresh = hwmgr->display_config->vrefresh; in vegam_populate_single_memory_level()
|
| H A D | amdgpu_fiji_smumgr.c | 981 data->display_timing.min_clock_in_sr = hwmgr->display_config->min_core_set_clock_in_sr; in fiji_populate_single_graphic_level()
1206 data->display_timing.num_existing_displays = hwmgr->display_config->num_display; in fiji_populate_single_memory_level()
1207 data->display_timing.vrefresh = hwmgr->display_config->vrefresh; in fiji_populate_single_memory_level()
|
| H A D | amdgpu_polaris10_smumgr.c | 949 data->display_timing.min_clock_in_sr = hwmgr->display_config->min_core_set_clock_in_sr; in polaris10_populate_single_graphic_level()
1111 data->display_timing.num_existing_displays = hwmgr->display_config->num_display; in polaris10_populate_single_memory_level()
1112 data->display_timing.vrefresh = hwmgr->display_config->vrefresh; in polaris10_populate_single_memory_level()
|
| H A D | amdgpu_ci_smumgr.c | 1239 data->display_timing.num_existing_displays = hwmgr->display_config->num_display; in ci_populate_single_memory_level()
1240 data->display_timing.vrefresh = hwmgr->display_config->vrefresh; in ci_populate_single_memory_level()
|