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Searched refs:dcef_table (Results 1 – 10 of 10) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/powerplay/
H A Dvega20_ppt.h118 struct vega20_single_dpm_table dcef_table; member
H A Damdgpu_vega20_ppt.c825 single_dpm_table = &(dpm_table->dcef_table); in vega20_set_default_dpm_table()
1056 single_dpm_table = &(dpm_table->dcef_table); in vega20_print_clk_levels()
1265 single_dpm_table = &(dpm_table->dcef_table); in vega20_upload_dpm_level()
1405 single_dpm_table = &(dpm_table->dcef_table); in vega20_force_clk_levels()
1465 single_dpm_table = &(dpm_table->dcef_table); in vega20_get_clock_by_type_with_latency()
H A Damdgpu_navi10_ppt.c644 dpm_context->dpm_tables.dcef_table.min = driver_ppt->FreqTableDcefclk[0]; in navi10_set_default_dpm_table()
645 dpm_context->dpm_tables.dcef_table.max = driver_ppt->FreqTableDcefclk[NUM_DCEFCLK_DPM_LEVELS - 1]; in navi10_set_default_dpm_table()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/powerplay/inc/
H A Dsmu_v11_0.h107 struct smu_11_0_dpm_table dcef_table; member
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
H A Damdgpu_vega12_hwmgr.c645 dpm_table = &(data->dpm_table.dcef_table); in vega12_setup_default_dpm_tables()
1113 min_freq = data->dpm_table.dcef_table.dpm_state.hard_min_level; in vega12_upload_dpm_min_level()
1787 dpm_table = &(data->dpm_table.dcef_table); in vega12_get_dcefclocks()
1965 if (hard_min_level >= data->dpm_table.dcef_table.count) { in vega12_force_clock_level()
1968 data->dpm_table.dcef_table.count - 1); in vega12_force_clock_level()
1972 data->dpm_table.dcef_table.dpm_state.hard_min_level = in vega12_force_clock_level()
1973 data->dpm_table.dcef_table.dpm_levels[hard_min_level].value; in vega12_force_clock_level()
H A Dvega12_hwmgr.h134 struct vega12_single_dpm_table dcef_table; member
H A Dvega10_hwmgr.h155 struct vega10_single_dpm_table dcef_table; member
H A Dvega20_hwmgr.h186 struct vega20_single_dpm_table dcef_table; member
H A Damdgpu_vega20_hwmgr.c720 dpm_table = &(data->dpm_table.dcef_table); in vega20_setup_default_dpm_tables()
1884 min_freq = data->dpm_table.dcef_table.dpm_state.hard_min_level; in vega20_upload_dpm_min_level()
2638 if (hard_min_level >= data->dpm_table.dcef_table.count) { in vega20_force_clock_level()
2641 data->dpm_table.dcef_table.count - 1); in vega20_force_clock_level()
2645 data->dpm_table.dcef_table.dpm_state.hard_min_level = in vega20_force_clock_level()
2646 data->dpm_table.dcef_table.dpm_levels[hard_min_level].value; in vega20_force_clock_level()
2821 struct vega20_single_dpm_table *dpm_table = &(data->dpm_table.dcef_table); in vega20_get_dcefclocks()
H A Damdgpu_vega10_hwmgr.c1421 dpm_table = &(data->dpm_table.dcef_table); in vega10_setup_default_dpm_tables()
3969 &data->dpm_table.dcef_table; in vega10_notify_smc_display_config_after_ps_adjustment()
4540 struct vega10_single_dpm_table *dcef_table = &(data->dpm_table.dcef_table); in vega10_print_clock_levels() local
4596 for (i = 0; i < dcef_table->count; i++) in vega10_print_clock_levels()
4598 i, dcef_table->dpm_levels[i].value / 100, in vega10_print_clock_levels()
4599 (dcef_table->dpm_levels[i].value / 100 == now) ? in vega10_print_clock_levels()