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Searched refs:dc_state (Results 1 – 25 of 57) sorted by relevance

123

/netbsd-src/sys/dev/hpc/
H A Dhpcfb.c130 volatile int dc_state; member
146 (((dc)->dc_state&HPCFB_DC_CURRENT)&& \
147 (((dc)->dc_state&(HPCFB_DC_DRAWING|HPCFB_DC_SWITCHREQ)) == 0))
360 sc->sc_dc->dc_state |= HPCFB_DC_SCRTHREAD; in hpcfb_thread()
363 sc->sc_dc->dc_state &= ~HPCFB_DC_SCRTHREAD; in hpcfb_thread()
400 hpcfb_console_dc.dc_state |= HPCFB_DC_CURRENT; in hpcfb_cnattach()
586 if (dc->dc_state&HPCFB_DC_DRAWING) in hpcfb_ioctl()
587 dc->dc_state &= ~HPCFB_DC_ABORT; in hpcfb_ioctl()
591 dc->dc_state |= HPCFB_DC_UPDATEALL; in hpcfb_ioctl()
597 dc->dc_state |= HPCFB_DC_ABORT; in hpcfb_ioctl()
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/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/
H A Ddcn20_resource.h55 struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes);
57 struct dc_state *state,
120 struct dc_state *context,
123 bool dcn20_validate_bandwidth(struct dc *dc, struct dc_state *context, bool fast_validate);
126 struct dc_state *context);
129 struct dc_state *context,
132 bool dcn20_validate_dsc(struct dc *dc, struct dc_state *new_ctx);
149 struct dc_state *context,
155 struct dc *dc, struct dc_state *context,
160 enum dc_status dcn20_build_mapped_resource(const struct dc *dc, struct dc_state *context, struct dc…
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H A Ddcn20_hwseq.h39 struct dc_state *context);
69 struct dc_state *context);
72 struct dc_state *context);
75 struct dc_state *context);
78 struct dc_state *context);
81 struct dc_state *context,
110 struct dc_state *context);
114 void dcn20_update_odm(struct dc *dc, struct dc_state *context, struct pipe_ctx *pipe_ctx);
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/
H A Dresource.h89 struct dc_state *context,
96 struct dc_state *context);
135 struct dc_state *context,
144 struct dc_state *old_context, struct dc_stream_state *stream);
149 const struct dc_state *old_context,
150 struct dc_state *context,
154 const struct dc_state *src_ctx,
155 struct dc_state *dst_ctx);
159 struct dc_state *context,
164 struct dc_state *context,
H A Dhw_sequencer.h43 struct dc_state;
62 struct dc_state *context);
64 struct dc_state *context);
68 int num_planes, struct dc_state *context);
70 struct dc_state *context);
117 void (*prepare_bandwidth)(struct dc *dc, struct dc_state *context);
118 bool (*update_bandwidth)(struct dc *dc, struct dc_state *context);
119 void (*optimize_bandwidth)(struct dc *dc, struct dc_state *context);
155 struct dc_state *context);
158 struct dc_state *context);
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H A Dcore_types.h79 struct dc_state *state,
90 struct dc_state;
101 struct dc_state *context,
106 struct dc_state *context,
111 struct dc_state *context);
114 struct dc_state *context,
122 struct dc_state *new_ctx,
127 struct dc_state *new_ctx,
143 struct dc_state *context,
363 struct dc_state { struct
H A Dhw_sequencer_private.h52 struct dc_state;
73 void (*init_pipes)(struct dc *dc, struct dc_state *context);
74 void (*reset_hw_ctx_wrap)(struct dc *dc, struct dc_state *context);
98 struct dc_state *context,
123 void (*update_odm)(struct dc *dc, struct dc_state *context,
127 struct dc_state *context);
138 struct dc_state *context);
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
H A Ddcn10_hw_sequencer.h42 struct dc_state *context,
46 struct dc_state *context);
49 struct dc_state *context);
73 struct dc_state *context);
79 struct dc_state *context);
97 struct dc_state *context);
100 void dcn10_init_pipes(struct dc *dc, struct dc_state *context);
103 struct dc_state *context);
108 void dce110_enable_accelerated_mode(struct dc *dc, struct dc_state *context);
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce110/
H A Ddce110_hw_sequencer.h35 struct dc_state;
42 struct dc_state *context);
60 void dce110_enable_accelerated_mode(struct dc *dc, struct dc_state *context);
70 struct dc_state *context);
74 struct dc_state *context);
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/
H A Ddc.h208 struct dc_state;
482 struct dc_state;
500 struct dc_state *current_state;
892 void get_clock_requirements_for_state(struct dc_state *state, struct AsicStateEx *info);
903 struct dc_state *new_ctx,
909 struct dc_state *dst_ctx);
912 const struct dc_state *src_ctx,
913 struct dc_state *dst_ctx);
917 struct dc_state *dst_ctx);
919 void dc_resource_state_destruct(struct dc_state *context);
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H A Ddc_stream.h280 struct dc_state *state);
313 struct dc_state *new_ctx,
318 struct dc_state *new_ctx,
326 struct dc_state *context);
332 struct dc_state *context);
337 struct dc_state *context);
344 struct dc_state *context);
380 struct dc_state *context,
405 struct dc_state *state,
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce112/
H A Ddce112_resource.h44 struct dc_state *context,
45 struct dc_state *old_context);
49 struct dc_state *context,
54 struct dc_state *new_ctx,
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dcn20/
H A Ddcn20_clk_mgr.h32 struct dc_state *context,
36 struct dc_state *context,
39 struct dc_state *context, bool safe_to_lower);
51 struct dc_state *context,
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dce110/
H A Ddce110_clk_mgr.h36 const struct dc_state *context,
42 struct dc_state *context);
44 uint32_t dce110_get_min_vblank_time_us(const struct dc_state *context);
H A Damdgpu_dce110_clk_mgr.c97 uint32_t dce110_get_min_vblank_time_us(const struct dc_state *context) in dce110_get_min_vblank_time_us()
125 const struct dc_state *context, in dce110_fill_display_configs()
179 struct dc_state *context) in dce11_pplib_apply_display_requirements()
254 struct dc_state *context, in dce11_update_clocks()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce100/
H A Ddce100_hw_sequencer.h35 struct dc_state;
41 struct dc_state *context);
45 struct dc_state *context);
H A Damdgpu_dce100_hw_sequencer.c115 struct dc_state *context) in dce100_prepare_bandwidth()
127 struct dc_state *context) in dce100_optimize_bandwidth()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_mst_types.c746 struct dc_state *dc_state, in compute_mst_dsc_configs_for_link() argument
759 for (i = 0; i < dc_state->stream_count; i++) { in compute_mst_dsc_configs_for_link()
762 stream = dc_state->streams[i]; in compute_mst_dsc_configs_for_link()
841 struct dc_state *dc_state) in compute_mst_dsc_configs_for_state() argument
848 for (i = 0; i < dc_state->stream_count; i++) in compute_mst_dsc_configs_for_state()
851 for (i = 0; i < dc_state->stream_count; i++) { in compute_mst_dsc_configs_for_state()
852 stream = dc_state->streams[i]; in compute_mst_dsc_configs_for_state()
869 if (!compute_mst_dsc_configs_for_link(state, dc_state, stream->link)) { in compute_mst_dsc_configs_for_state()
875 for (j = 0; j < dc_state->stream_count; j++) { in compute_mst_dsc_configs_for_state()
876 if (dc_state->streams[j]->link == stream->link) in compute_mst_dsc_configs_for_state()
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H A Damdgpu_dm_mst_types.h41 struct dc_state *dc_state);
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/
H A Damdgpu_dc.c759 struct dc_state *context) in disable_all_writeback_pipes_for_stream()
769 static void disable_dangling_plane(struct dc *dc, struct dc_state *context) in disable_dangling_plane()
772 struct dc_state *dangling_context = dc_create_state(dc); in disable_dangling_plane()
773 struct dc_state *current_ctx; in disable_dangling_plane()
806 static void wait_for_no_pipes_pending(struct dc *dc, struct dc_state *context) in wait_for_no_pipes_pending()
922 struct dc_state *ctx) in enable_timing_multisync()
946 struct dc_state *ctx) in program_timing_sync()
1030 struct dc_state *context) in context_changed()
1164 struct dc_state *context, in dc_enable_stereo()
1191 static enum dc_status dc_commit_state_no_check(struct dc *dc, struct dc_state *context) in dc_commit_state_no_check()
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/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn21/
H A Ddcn21_hwseq.h43 struct dc_state *context);
47 struct dc_state *context);
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
H A Ddce_clk_mgr.c189 static uint32_t get_max_pixel_clock_for_all_paths(struct dc_state *context) in get_max_pixel_clock_for_all_paths()
220 struct dc_state *context) in dce_get_required_clocks_state()
497 const struct dc_state *context, in dce110_fill_display_configs()
549 static uint32_t dce110_get_min_vblank_time_us(const struct dc_state *context) in dce110_get_min_vblank_time_us()
601 struct dc_state *context) in dce_pplib_apply_display_requirements()
615 struct dc_state *context) in dce11_pplib_apply_display_requirements()
674 struct dc_state *context, in dce_update_clocks()
701 struct dc_state *context, in dce11_update_clocks()
728 struct dc_state *context, in dce112_update_clocks()
755 struct dc_state *context, in dce12_update_clocks()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dce100/
H A Ddce_clk_mgr.h39 struct dc_state *context);
41 uint32_t dce_get_max_pixel_clock_for_all_paths(struct dc_state *context);
H A Damdgpu_dce_clk_mgr.c170 uint32_t dce_get_max_pixel_clock_for_all_paths(struct dc_state *context) in dce_get_max_pixel_clock_for_all_paths()
201 struct dc_state *context) in dce_get_required_clocks_state()
388 struct dc_state *context) in dce_pplib_apply_display_requirements()
401 struct dc_state *context, in dce_update_clocks()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/include/
H A Dlogger_interface.h37 struct dc_state;
65 struct dc_state *context);

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