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Searched refs:ctl (Results 1 – 25 of 247) sorted by relevance

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/netbsd-src/sys/arch/mvme68k/stand/sboot/
H A Dconsole.c38 volatile u_char ctl; member
55 zs->ctl = 1; rr1 = zs->ctl; in consinit()
56 zs->ctl = 0; in consinit()
57 if ((rr1 & 0x1) == 1 && (zs->ctl & 0x4) == 4) in consinit()
60 zs->ctl = 9; in consinit()
61 zs->ctl = 0x00; /* clear interrupt */ in consinit()
62 zs->ctl = 4; in consinit()
63 zs->ctl = 0x44; /* 16x clk, 1 stop bit */ in consinit()
64 zs->ctl = 5; in consinit()
65 zs->ctl = 0xea; /* DTR on, 8 bit xmit, xmit on, RTS on */ in consinit()
[all …]
/netbsd-src/sys/netinet/
H A Dtcp_vtw.c154 vtw_ctl_t *ctl; member
325 idx_encode(vtw_ctl_t *ctl, uint32_t idx) in idx_encode()
327 return (idx << ctl->idx_bits) | idx;
331 idx_decode(vtw_ctl_t *ctl, uint32_t bits) in idx_decode()
333 uint32_t idx = bits & ctl->idx_mask; in idx_decode()
335 if (idx_encode(ctl, idx) == bits) in idx_decode()
418 vtw_index_v4(vtw_ctl_t *ctl, vtw_v4_t *v4) in vtw_index_v4()
420 if (ctl->base.v4 <= v4 && v4 <= ctl->lim.v4) in vtw_index_v4()
421 return v4 - ctl in vtw_index_v4()
322 idx_encode(vtw_ctl_t * ctl,uint32_t idx) idx_encode() argument
328 idx_decode(vtw_ctl_t * ctl,uint32_t bits) idx_decode() argument
415 vtw_index_v4(vtw_ctl_t * ctl,vtw_v4_t * v4) vtw_index_v4() argument
426 vtw_index_v6(vtw_ctl_t * ctl,vtw_v6_t * v6) vtw_index_v6() argument
437 vtw_index(vtw_ctl_t * ctl,vtw_t * vtw) vtw_index() argument
454 vtw_from_index(vtw_ctl_t * ctl,uint32_t idx) vtw_from_index() argument
490 vtw_next(vtw_ctl_t * ctl,vtw_t * vtw) vtw_next() argument
511 vtw_unhash(vtw_ctl_t * ctl,vtw_t * vtw) vtw_unhash() argument
673 vtw_del(vtw_ctl_t * ctl,vtw_t * vtw) vtw_del() argument
702 vtw_inshash_v4(vtw_ctl_t * ctl,vtw_t * vtw) vtw_inshash_v4() argument
741 vtw_inshash_v6(vtw_ctl_t * ctl,vtw_t * vtw) vtw_inshash_v6() argument
770 vtw_lookup_hash_v4(vtw_ctl_t * ctl,uint32_t faddr,uint16_t fport,uint32_t laddr,uint16_t lport,int which) vtw_lookup_hash_v4() argument
923 vtw_lookup_hash_v6(vtw_ctl_t * ctl,const struct in6_addr * faddr,uint16_t fport,const struct in6_addr * laddr,uint16_t lport,int which) vtw_lookup_hash_v6() argument
1024 vtw_ctl_t *ctl = it->ctl; vtw_next_port_v4() local
1138 vtw_ctl_t *ctl = it->ctl; vtw_next_port_v6() local
1277 vtw_init(fatp_ctl_t * fat,vtw_ctl_t * ctl,const uint32_t n,vtw_t * ctl_base_v) vtw_init() argument
1373 vtw_alloc(vtw_ctl_t * ctl) vtw_alloc() argument
1482 vtw_age(vtw_ctl_t * ctl,struct timeval * _when) vtw_age() argument
1599 vtw_export_v4(vtw_ctl_t * ctl,vtw_t * vtw,vestigial_inpcb_t * res) vtw_export_v4() argument
1654 vtw_ctl_t *ctl; tcp_lookup_v4() local
1698 vtw_export_v6(vtw_ctl_t * ctl,vtw_t * vtw,vestigial_inpcb_t * res) vtw_export_v6() argument
1753 vtw_ctl_t *ctl; tcp_lookup_v6() local
1781 vtw_ctl_t *ctl; vtw_select() local
1808 vtw_ctl_t *ctl; vtw_control_init() local
1849 vtw_ctl_t *ctl; vtw_control() local
1879 vtw_ctl_t *ctl; vtw_add() local
2059 vtw_ctl_t *ctl; vtw_restart_v4() local
2107 vtw_ctl_t *ctl; vtw_restart_v6() local
2226 vtw_ctl_t *ctl; vtw_debug_add() local
2372 vtw_ctl_t *ctl; vtw_sanity_check() local
[all...]
/netbsd-src/external/bsd/ipf/dist/ipsend/
H A Ddlcommon.c49 struct strbuf ctl; local
54 ctl.maxlen = 0;
55 ctl.len = sizeof (info_req);
56 ctl.buf = (char *) &info_req;
60 if (putmsg(fd, &ctl, (struct strbuf*) NULL, flags) < 0)
70 struct strbuf ctl; local
73 ctl.maxlen = MAXDLBUF;
74 ctl.len = 0;
75 ctl.buf = bufp;
77 strgetmsg(fd, &ctl, (struct strbuf*)NULL, &flags, "dlinfoack");
[all …]
/netbsd-src/sys/dev/marvell/
H A Dmvspi.c108 int ctl; in mvspi_attach() local
127 ctl = GETREG(sc, MVSPI_INTCONF_REG); in mvspi_attach()
129 ctl &= MVSPI_DIRHS_MASK; in mvspi_attach()
130 ctl &= MVSPI_1BYTE_MASK; in mvspi_attach()
132 PUTREG(sc, MVSPI_INTCONF_REG, ctl); in mvspi_attach()
159 uint32_t ctl = 0, spr, sppr; in mvspi_configure() local
171 ctl &= ~(MVSPI_CPOL_MASK); in mvspi_configure()
173 ctl &= MVSPI_CPHA_MASK; in mvspi_configure()
176 ctl |= MVSPI_CPOL_MASK; in mvspi_configure()
177 ctl &= MVSPI_CPHA_MASK; in mvspi_configure()
[all …]
/netbsd-src/external/mpl/dhcp/dist/common/
H A Ddlpi.c836 struct strbuf ctl; local
841 ctl.maxlen = 0;
842 ctl.len = sizeof (info_req);
843 ctl.buf = (char *)&info_req;
847 return putmsg (fd, &ctl, (struct strbuf *)NULL, flags);
858 struct strbuf ctl; local
864 ctl.maxlen = 0;
865 ctl.len = sizeof (physaddr_req);
866 ctl.buf = (char *)&physaddr_req;
870 return putmsg (fd, &ctl, (struct strbuf *)NULL, flags);
[all …]
/netbsd-src/sys/dev/hdaudio/
H A Dhdafg.c266 #define HDAUDIO_CONTROL_GIVE(ctl) ((ctl)->ctl_step ? 1 : 0) argument
446 struct hdaudio_control *ctl; in hdafg_control_lookup() local
452 ctl = &sc->sc_ctls[i]; in hdafg_control_lookup()
453 if (ctl->ctl_enable == false) in hdafg_control_lookup()
455 if (ctl->ctl_widget->w_nid != nid) in hdafg_control_lookup()
457 if (dir && ctl->ctl_ndir != dir) in hdafg_control_lookup()
459 if (index >= 0 && ctl->ctl_ndir == HDAUDIO_PINDIR_IN && in hdafg_control_lookup()
460 ctl->ctl_dir == ctl->ctl_ndir && ctl->ctl_index != index) in hdafg_control_lookup()
464 return ctl; in hdafg_control_lookup()
1235 struct hdaudio_control *ctl; in hdafg_control_parse() local
[all …]
/netbsd-src/sys/arch/arm/cortex/
H A Dgic_v2m.c127 pcireg_t ctl; in gic_v2m_msi_enable() local
133 ctl = pci_conf_read(pc, tag, off + PCI_MSI_CTL); in gic_v2m_msi_enable()
134 ctl &= ~PCI_MSI_CTL_MSI_ENABLE; in gic_v2m_msi_enable()
135 pci_conf_write(pc, tag, off + PCI_MSI_CTL, ctl); in gic_v2m_msi_enable()
137 ctl = pci_conf_read(pc, tag, off + PCI_MSI_CTL); in gic_v2m_msi_enable()
138 ctl &= ~PCI_MSI_CTL_MME_MASK; in gic_v2m_msi_enable()
139 ctl |= __SHIFTIN(ilog2(count), PCI_MSI_CTL_MME_MASK); in gic_v2m_msi_enable()
140 pci_conf_write(pc, tag, off + PCI_MSI_CTL, ctl); in gic_v2m_msi_enable()
145 ctl = pci_conf_read(pc, tag, off + PCI_MSI_CTL); in gic_v2m_msi_enable()
146 if (ctl & PCI_MSI_CTL_64BIT_ADDR) { in gic_v2m_msi_enable()
[all …]
/netbsd-src/sys/dev/i2c/
H A Dem3027.c147 struct ctl { in em3027rtc_attach() struct
152 } ctl; in em3027rtc_attach() local
167 error = em3027rtc_read(sc, EM3027_CONTROL_BASE, &ctl, sizeof(ctl)); in em3027rtc_attach()
176 aprint_debug_dev(sc->sc_dev, "status=0x%02x\n", ctl.status); in em3027rtc_attach()
179 if (ctl.status & EM3027_STATUS_VLOW2) { in em3027rtc_attach()
183 else if (ctl.status & EM3027_STATUS_VLOW1) { in em3027rtc_attach()
188 ctl.status = EM3027_STATUS_POWER_ON; in em3027rtc_attach()
192 aprint_debug_dev(sc->sc_dev, "on/off=0x%02x\n", ctl.onoff); in em3027rtc_attach()
194 if ((ctl.onoff & EM3027_ONOFF_SR) == 0) { in em3027rtc_attach()
196 ctl.onoff |= EM3027_ONOFF_SR; in em3027rtc_attach()
[all …]
/netbsd-src/sys/arch/alpha/pci/
H A Dmcpcia.c132 uint32_t ctl; in mcpciaattach() local
163 ctl = REGVAL(MCPCIA_PCI_REV(ccp)); in mcpciaattach()
166 " CAP Revision %d\n", HORSE_REV(ctl), in mcpciaattach()
167 (SADDLE_TYPE(ctl) & 1)? "Right": "Left", SADDLE_REV(ctl), in mcpciaattach()
168 CAP_REV(ctl)); in mcpciaattach()
244 uint32_t ctl; in mcpcia_init0() local
272 ctl = REGVAL(MCPCIA_WHOAMI(ccp)); in mcpcia_init0()
273 mcbus_primary.mcbus_cpu_mid = MCBUS_CPU_MID(ctl); in mcpcia_init0()
274 if ((MCBUS_CPU_INFO(ctl) & CPU_Fill_Err) == 0 && in mcpcia_init0()
277 MCBUS_CPU_INFO(ctl) & CPU_BCacheMask; in mcpcia_init0()
[all …]
H A Ddwlpx.c80 uint32_t ctl; in dwlpxmatch() local
91 if (badaddr(KV(PCIA_CTL(1) + ls), sizeof (ctl)) != 0) { in dwlpxmatch()
184 uint32_t ctl; in dwlpx_init() local
199 sizeof (ctl)) != 0) { in dwlpx_init()
225 ctl = REGVAL(PCIA_PRESENT + ccp->cc_sysbase); in dwlpx_init()
234 } else if ((ctl >> PCIA_PRESENT_REVSHIFT) & PCIA_PRESENT_REVMASK) { in dwlpx_init()
266 ctl = REGVAL(PCIA_CTL(i) + ccp->cc_sysbase); in dwlpx_init()
267 ctl &= 0x0fffffff; in dwlpx_init()
268 ctl &= ~(PCIA_CTL_MHAE(0x1f) | PCIA_CTL_IHAE(0x1f)); in dwlpx_init()
273 ctl |= PCIA_CTL_RMMENA | PCIA_CTL_RMMARB; in dwlpx_init()
[all …]
/netbsd-src/sys/dev/pci/
H A Duniverse_pci.c172 u_int32_t ctl = 0x80000000; in univ_pci_mapvme() local
176 ctl |= 0x00020000; in univ_pci_mapvme()
179 ctl |= 0x00010000; in univ_pci_mapvme()
187 ctl |= 0x00001000; in univ_pci_mapvme()
189 ctl |= 0x00004000; in univ_pci_mapvme()
191 ctl |= 0x00800000; in univ_pci_mapvme()
193 ctl |= 0x00400000; in univ_pci_mapvme()
199 d->devname, wnd, vmebase, vmebase + len, pcibase, ctl); in univ_pci_mapvme()
205 write_pcislv(d, wnd, lsi_ctl, ctl); in univ_pci_mapvme()
222 u_int32_t ctl = 0x80000000; in univ_pci_mappci() local
[all …]
/netbsd-src/sys/dev/ic/
H A Dds1286reg.h148 u_int ctl; \
151 ctl = ds1286_read(sc, DS1286_CONTROL); \
152 ds1286_write(sc, DS1286_CONTROL, ctl | DS1286_TE); \
159 ds1286_write(sc, DS1286_CONTROL, ctl); \
169 u_int ctl; \
172 ctl = ds1286_read(sc, DS1286_CONTROL); \
173 ds1286_write(sc, DS1286_CONTROL, ctl | DS1286_TE); \
180 ds1286_write(sc, DS1286_CONTROL, ctl); \
H A Dds1687reg.h218 u_int ctl; \
221 ctl = ds1687_read(sc, DS1687_CONTROLB); \
222 ds1687_write(sc, DS1687_CONTROLB, ctl | DS1687_SET); \
234 ds1687_write(sc, DS1687_CONTROLB, ctl); \
244 u_int ctl; \
247 ctl = ds1687_read(sc, DS1687_CONTROLB); \
248 ds1687_write(sc, DS1687_CONTROLB, ctl | DS1687_SET); \
260 ds1687_write(sc, DS1687_CONTROLB, ctl); \
/netbsd-src/sys/arch/x86/pci/
H A Dmsipic.c340 pcireg_t ctl; in msi_set_msictl_enablebit() local
353 ctl = pci_conf_read(pc, tag, off + PCI_MSI_CTL); in msi_set_msictl_enablebit()
355 ctl |= PCI_MSI_CTL_MSI_ENABLE; in msi_set_msictl_enablebit()
357 ctl &= ~PCI_MSI_CTL_MSI_ENABLE; in msi_set_msictl_enablebit()
360 pci_conf_write16(pc, tag, off + PCI_MSI_CTL + 2, ctl >> 16); in msi_set_msictl_enablebit()
362 pci_conf_write(pc, tag, off, ctl); in msi_set_msictl_enablebit()
394 pcireg_t ctl; in msi_addroute() local
403 ctl = pci_conf_read(pc, tag, off + PCI_MSI_CTL); in msi_addroute()
428 if (ctl & PCI_MSI_CTL_64BIT_ADDR) { in msi_addroute()
437 ctl |= PCI_MSI_CTL_MSI_ENABLE; in msi_addroute()
[all …]
/netbsd-src/sys/arch/arm/apple/
H A Dapple_pcie.c470 pcireg_t ctl; in apple_pcie_msi_msi_enable() local
476 ctl = pci_conf_read(pc, tag, off + PCI_MSI_CTL); in apple_pcie_msi_msi_enable()
477 ctl &= ~PCI_MSI_CTL_MSI_ENABLE; in apple_pcie_msi_msi_enable()
478 pci_conf_write(pc, tag, off + PCI_MSI_CTL, ctl); in apple_pcie_msi_msi_enable()
480 ctl = pci_conf_read(pc, tag, off + PCI_MSI_CTL); in apple_pcie_msi_msi_enable()
481 ctl &= ~PCI_MSI_CTL_MME_MASK; in apple_pcie_msi_msi_enable()
482 ctl |= __SHIFTIN(ilog2(count), PCI_MSI_CTL_MME_MASK); in apple_pcie_msi_msi_enable()
483 pci_conf_write(pc, tag, off + PCI_MSI_CTL, ctl); in apple_pcie_msi_msi_enable()
488 ctl = pci_conf_read(pc, tag, off + PCI_MSI_CTL); in apple_pcie_msi_msi_enable()
489 if (ctl & PCI_MSI_CTL_64BIT_ADDR) { in apple_pcie_msi_msi_enable()
[all …]
/netbsd-src/sys/arch/luna68k/dev/
H A Dif_le.c220 volatile struct { uint32_t ctl; } *ds1220; in myetheraddr() member
243 ds1220->ctl = (loc) << 16; in myetheraddr()
244 u = 0xf0 & (ds1220->ctl >> 12); in myetheraddr()
245 ds1220->ctl = (loc + 1) << 16; in myetheraddr()
246 l = 0x0f & (ds1220->ctl >> 16); in myetheraddr()
249 ds1220->ctl = (loc + 2) << 16; in myetheraddr()
250 u = 0xf0 & (ds1220->ctl >> 12); in myetheraddr()
251 ds1220->ctl = (loc + 3) << 16; in myetheraddr()
252 l = 0x0f & (ds1220->ctl >> 16); in myetheraddr()
/netbsd-src/external/bsd/am-utils/dist/scripts/
H A DMakefile.am12 ctl-amd \
13 ctl-hlfsd \
21 redhat-ctl-amd \
34 ctl-amd.in \
35 ctl-hlfsd.in \
39 redhat-ctl-amd.in \
/netbsd-src/sys/arch/luna68k/stand/boot/
H A Dif_le.c239 volatile struct { uint32_t ctl; } *ds1220; in myetheraddr() member
262 ds1220->ctl = (loc) << 16; in myetheraddr()
263 u = 0xf0 & (ds1220->ctl >> 12); in myetheraddr()
264 ds1220->ctl = (loc + 1) << 16; in myetheraddr()
265 l = 0x0f & (ds1220->ctl >> 16); in myetheraddr()
268 ds1220->ctl = (loc + 2) << 16; in myetheraddr()
269 u = 0xf0 & (ds1220->ctl >> 12); in myetheraddr()
270 ds1220->ctl = (loc + 3) << 16; in myetheraddr()
271 l = 0x0f & (ds1220->ctl >> 16); in myetheraddr()
/netbsd-src/sbin/mount_portal/
H A Dactivate.c112 void *ctl = NULL; in send_reply() local
138 ctl = malloc(cmsgsize); in send_reply()
139 if (ctl == NULL) { in send_reply()
143 memset(ctl, 0, cmsgsize); in send_reply()
145 cmsg = (struct cmsghdr *) ctl; in send_reply()
153 msg.msg_control = ctl; in send_reply()
176 if (ctl != NULL) in send_reply()
177 free(ctl); in send_reply()
/netbsd-src/sys/arch/mips/alchemy/
H A Dau_timer.c75 uint32_t ctl, ctr, octr; in au_cal_timers() local
79 ctl = bus_space_read_4(st, sh, PC_COUNTER_CONTROL); in au_cal_timers()
80 if ((ctl & (CC_EO | CC_EN1)) != (CC_EO | CC_EN1)) in au_cal_timers()
81 SET_PC_REG(PC_COUNTER_CONTROL, 0, ctl | CC_EO | CC_EN1); in au_cal_timers()
109 if ((ctl & (CC_EO | CC_EN1)) != (CC_EO | CC_EN1)) in au_cal_timers()
110 SET_PC_REG(PC_COUNTER_CONTROL, 0, ctl); in au_cal_timers()
/netbsd-src/sys/arch/arm/sunxi/
H A Dsun4i_spi.c175 uint32_t ctl, cctl; in sun4ispi_configure() local
187 ctl = SPI_CTL_SDM | SPI_CTL_TP_EN | SPI_CTL_SSPOL | SPI_CTL_MODE | SPI_CTL_EN; in sun4ispi_configure()
191 ctl |= 0; in sun4ispi_configure()
194 ctl |= SPI_CTL_PHA; in sun4ispi_configure()
197 ctl |= SPI_CTL_POL; in sun4ispi_configure()
200 ctl |= SPI_CTL_PHA | SPI_CTL_POL; in sun4ispi_configure()
220 ctl, cctl, sc->sc_modclkrate, in sun4ispi_configure()
226 sc->sc_CTL = ctl; in sun4ispi_configure()
227 SPIREG_WRITE(sc, SPI_CTL, (ctl | SPI_CTL_RF_RST | SPI_CTL_TF_RST) & ~SPI_CTL_EN); in sun4ispi_configure()
229 SPIREG_WRITE(sc, SPI_CTL, ctl); in sun4ispi_configure()
[all …]
/netbsd-src/sys/compat/sunos/
H A Dsunos_ioctl.c412 int (*ctl)(struct file *, u_long, void *); in sunos_sys_ioctl() local
426 ctl = fp->f_ops->fo_ioctl; in sunos_sys_ioctl()
449 error = (*ctl)(fp, TIOCSETD, &disc); in sunos_sys_ioctl()
469 error = (*ctl)(fp, TIOCCONS, &on); in sunos_sys_ioctl()
477 if ((error = (*ctl)(fp, TIOCGWINSZ, &ws)) != 0) in sunos_sys_ioctl()
486 error = (*ctl)(fp, TIOCSWINSZ, &ws); in sunos_sys_ioctl()
494 if ((error = (*ctl)(fp, TIOCGWINSZ, &ws)) != 0) in sunos_sys_ioctl()
508 error = (*ctl)(fp, TIOCGPGRP, &pgrp); in sunos_sys_ioctl()
529 error = (*ctl)(fp, TIOCGPGRP, &pgrp); in sunos_sys_ioctl()
553 if ((error = (*ctl)(fp, TIOCGETA, &bts)) != 0) in sunos_sys_ioctl()
[all …]
/netbsd-src/sys/arch/sandpoint/stand/altboot/
H A Dsme.c278 uint32_t ctl; in mii_read() local
281 ctl = CSR_READ(l, MIIADDR); in mii_read()
282 } while (ctl & 01); in mii_read()
283 ctl = (phy << 11) | (reg << 6) | (0 << 1); /* READ op */ in mii_read()
284 CSR_WRITE(l, MIIADDR, ctl); in mii_read()
286 ctl = CSR_READ(l, MIIADDR); in mii_read()
287 } while (ctl & 01); in mii_read()
294 uint32_t ctl; in mii_write() local
297 ctl = CSR_READ(l, MIIADDR); in mii_write()
298 } while (ctl & 01); in mii_write()
[all …]
/netbsd-src/usr.sbin/bthcid/
H A Dclient.c90 int ctl; in init_control() local
101 ctl = socket(PF_LOCAL, SOCK_STREAM, 0); in init_control()
102 if (ctl < 0) in init_control()
109 if (bind(ctl, (struct sockaddr *)&un, sizeof(un)) < 0) { in init_control()
110 close(ctl); in init_control()
115 close(ctl); in init_control()
120 if (listen(ctl, 10) < 0) { in init_control()
121 close(ctl); in init_control()
126 event_set(&control_ev, ctl, EV_READ | EV_PERSIST, process_control, NULL); in init_control()
128 close(ctl); in init_control()
[all...]
/netbsd-src/sys/arch/news68k/dev/
H A Dsi.c186 sc->sc_regs->ctl = DC_CTL_RST; in si_attach()
250 dmac->ctl = DC_CTL_RST; in si_dma_start()
251 dmac->ctl = 0; in si_dma_start()
287 dmac->ctl = 0; in si_dma_start()
291 dmac->ctl = DC_CTL_ENB; in si_dma_start()
299 dmac->ctl = DC_CTL_MOD; in si_dma_start()
303 dmac->ctl = DC_CTL_MOD | DC_CTL_ENB; in si_dma_start()
368 dmac->ctl &= ~DC_CTL_ENB; in si_dma_stop()
396 dmac->ctl = DC_CTL_RST; in si_dma_stop()
397 dmac->ctl = 0; in si_dma_stop()

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