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Searched refs:createVirtualRegister (Results 1 – 25 of 146) sorted by relevance

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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
H A DMipsInstructionSelector.cpp168 Register LUiReg = B.getMRI()->createVirtualRegister(&Mips::GPR32RegClass); in materialize32BitImm()
322 Register PseudoMULTuReg = MRI.createVirtualRegister(&Mips::ACC64RegClass); in select()
373 Register JTIndex = MRI.createVirtualRegister(&Mips::GPR32RegClass); in select()
381 Register DestAddress = MRI.createVirtualRegister(&Mips::GPR32RegClass); in select()
389 Register Dest = MRI.createVirtualRegister(&Mips::GPR32RegClass); in select()
401 Register DestTmp = MRI.createVirtualRegister(&Mips::GPR32RegClass); in select()
480 Register ImplDef = MRI.createVirtualRegister(&Mips::GPR32RegClass); in select()
483 Register Tmp = MRI.createVirtualRegister(&Mips::GPR32RegClass); in select()
512 Register HILOReg = MRI.createVirtualRegister(&Mips::ACC64RegClass); in select()
598 Register GPRReg = MRI.createVirtualRegister(&Mips::GPR32RegClass); in select()
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H A DMipsISelLowering.cpp1247 Register VReg = MF.getRegInfo().createVirtualRegister(RC); in addLiveIn()
1548 Register Scratch = RegInfo.createVirtualRegister(RegInfo.getRegClass(OldVal)); in emitAtomicBinary()
1587 Register PtrCopy = RegInfo.createVirtualRegister(RegInfo.getRegClass(Ptr)); in emitAtomicBinary()
1588 Register IncrCopy = RegInfo.createVirtualRegister(RegInfo.getRegClass(Incr)); in emitAtomicBinary()
1602 RegInfo.createVirtualRegister(RegInfo.getRegClass(OldVal)); in emitAtomicBinary()
1631 Register ScrReg = RegInfo.createVirtualRegister(RC); in emitSignExtendToI32InReg()
1660 Register AlignedAddr = RegInfo.createVirtualRegister(RCp); in emitAtomicBinaryPartword()
1661 Register ShiftAmt = RegInfo.createVirtualRegister(RC); in emitAtomicBinaryPartword()
1662 Register Mask = RegInfo.createVirtualRegister(RC); in emitAtomicBinaryPartword()
1663 Register Mask2 = RegInfo.createVirtualRegister(RC); in emitAtomicBinaryPartword()
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H A DMipsMachineFunction.cpp50 MF.getRegInfo().createVirtualRegister(&getGlobalBaseRegClass(MF)); in getGlobalBaseReg()
76 Register V0 = RegInfo.createVirtualRegister(RC); in initGlobalBaseReg()
77 Register V1 = RegInfo.createVirtualRegister(RC); in initGlobalBaseReg()
H A DMips16ISelDAGToDAG.cpp78 V0 = RegInfo.createVirtualRegister(RC); in initGlobalBaseReg()
79 V1 = RegInfo.createVirtualRegister(RC); in initGlobalBaseReg()
80 V2 = RegInfo.createVirtualRegister(RC); in initGlobalBaseReg()
H A DMipsSEISelLowering.cpp3067 Register VR2 = RegInfo.createVirtualRegister(RC); in emitBPOSGE32()
3073 Register VR1 = RegInfo.createVirtualRegister(RC); in emitBPOSGE32()
3136 Register RD1 = RegInfo.createVirtualRegister(RC); in emitMSACBranchPseudo()
3142 Register RD2 = RegInfo.createVirtualRegister(RC); in emitMSACBranchPseudo()
3183 Wt = RegInfo.createVirtualRegister(&Mips::MSA128WEvensRegClass); in emitCOPY_FW()
3190 Register Wt = RegInfo.createVirtualRegister( in emitCOPY_FW()
3227 Register Wt = RegInfo.createVirtualRegister(&Mips::MSA128DRegClass); in emitCOPY_FD()
3253 Register Wt = RegInfo.createVirtualRegister( in emitINSERT_FW()
3289 Register Wt = RegInfo.createVirtualRegister(&Mips::MSA128DRegClass); in emitINSERT_FD()
3375 Register Wt = RegInfo.createVirtualRegister(VecRC); in emitINSERT_DF_VIDX()
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H A DMipsSEFrameLowering.cpp174 Register VR = MRI.createVirtualRegister(RC); in expandLoadCCond()
189 Register VR = MRI.createVirtualRegister(RC); in expandStoreCCond()
207 Register VR0 = MRI.createVirtualRegister(RC); in expandLoadACC()
208 Register VR1 = MRI.createVirtualRegister(RC); in expandLoadACC()
232 Register VR0 = MRI.createVirtualRegister(RC); in expandStoreACC()
233 Register VR1 = MRI.createVirtualRegister(RC); in expandStoreACC()
265 Register VR0 = MRI.createVirtualRegister(RC); in expandCopyACC()
266 Register VR1 = MRI.createVirtualRegister(RC); in expandCopyACC()
541 Register VR = MF.getRegInfo().createVirtualRegister(RC); in emitPrologue()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86SpeculativeLoadHardening.cpp447 PS->PoisonReg = MRI->createVirtualRegister(PS->RC); in runOnMachineFunction()
480 PS->InitialReg = MRI->createVirtualRegister(PS->RC); in runOnMachineFunction()
481 Register PredStateSubReg = MRI->createVirtualRegister(&X86::GR32RegClass); in runOnMachineFunction()
754 Register UpdatedStateReg = MRI->createVirtualRegister(PS->RC); in tracePredStateThroughCFG()
911 Register Reg = MRI->createVirtualRegister(UnfoldedRC); in unfoldCallAndJumpLoads()
969 TargetAddrSSA.Initialize(MRI->createVirtualRegister(&X86::GR64RegClass)); in tracePredStateThroughIndirectBranches()
1111 Register TargetReg = MRI->createVirtualRegister(&X86::GR64RegClass); in tracePredStateThroughIndirectBranches()
1162 Register AddrReg = MRI->createVirtualRegister(&X86::GR64RegClass); in tracePredStateThroughIndirectBranches()
1184 Register UpdatedStateReg = MRI->createVirtualRegister(PS->RC); in tracePredStateThroughIndirectBranches()
1508 Register Reg = MRI->createVirtualRegister(&X86::GR32RegClass); in saveEFLAGS()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/
H A DWebAssemblyFrameLowering.cpp231 SPReg = MRI.createVirtualRegister(PtrRC); in emitPrologue()
241 Register BasePtr = MRI.createVirtualRegister(PtrRC); in emitPrologue()
248 Register OffsetReg = MRI.createVirtualRegister(PtrRC); in emitPrologue()
256 Register BitmaskReg = MRI.createVirtualRegister(PtrRC); in emitPrologue()
300 Register OffsetReg = MRI.createVirtualRegister(PtrRC); in emitEpilogue()
306 SPReg = MRI.createVirtualRegister(PtrRC); in emitEpilogue()
H A DWebAssemblyRegisterInfo.cpp123 Register OffsetOp = MRI.createVirtualRegister(PtrRC); in eliminateFrameIndex()
128 FIRegOperand = MRI.createVirtualRegister(PtrRC); in eliminateFrameIndex()
H A DWebAssemblyPeephole.cpp66 Register NewReg = MRI.createVirtualRegister(MRI.getRegClass(OldReg)); in maybeRewriteToDrop()
123 Register NewReg = MRI.createVirtualRegister(RegClass); in maybeRewriteToFallthrough()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DSIInstrInfo.cpp1057 Register SReg = MRI.createVirtualRegister(BoolXExecRC); in insertVectorSelect()
1070 Register SReg = MRI.createVirtualRegister(BoolXExecRC); in insertVectorSelect()
1084 Register SReg = MRI.createVirtualRegister(BoolXExecRC); in insertVectorSelect()
1100 Register SReg = MRI.createVirtualRegister(BoolXExecRC); in insertVectorSelect()
1114 Register SReg = MRI.createVirtualRegister(BoolXExecRC); in insertVectorSelect()
1126 Register SReg = MRI.createVirtualRegister(BoolXExecRC); in insertVectorSelect()
1127 Register SReg2 = MRI.createVirtualRegister(RI.getBoolRC()); in insertVectorSelect()
1144 Register SReg = MRI.createVirtualRegister(BoolXExecRC); in insertVectorSelect()
1145 Register SReg2 = MRI.createVirtualRegister(RI.getBoolRC()); in insertVectorSelect()
1175 Register Reg = MRI.createVirtualRegister(RI.getBoolRC()); in insertEQ()
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H A DAMDGPUInstructionSelector.cpp150 Register MaskedReg = MRI->createVirtualRegister(SrcRC); in selectCOPY()
238 Register DstReg = MRI->createVirtualRegister(&SubRC); in getSubOperand64()
335 Register UnusedCarry = MRI->createVirtualRegister(TRI.getWaveMaskRegClass()); in selectG_ADD_SUB()
358 Register DstLo = MRI->createVirtualRegister(&HalfRC); in selectG_ADD_SUB()
359 Register DstHi = MRI->createVirtualRegister(&HalfRC); in selectG_ADD_SUB()
370 Register CarryReg = MRI->createVirtualRegister(CarryRC); in selectG_ADD_SUB()
377 .addDef(MRI->createVirtualRegister(CarryRC), RegState::Dead) in selectG_ADD_SUB()
777 Register InterpMov = MRI->createVirtualRegister(&AMDGPU::VGPR_32RegClass); in selectInterpP1F16()
1377 Register M0Base = MRI->createVirtualRegister(&AMDGPU::SReg_32RegClass); in selectDSGWSIntrinsic()
1646 Register TmpReg = MRI->createVirtualRegister( in selectImageIntrinsic()
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H A DSILoadStoreOptimizer.cpp1079 Register DestReg = MRI->createVirtualRegister(SuperRC); in mergeRead2Pair()
1087 Register ImmReg = MRI->createVirtualRegister(&AMDGPU::SReg_32RegClass); in mergeRead2Pair()
1091 BaseReg = MRI->createVirtualRegister(&AMDGPU::VGPR_32RegClass); in mergeRead2Pair()
1181 Register ImmReg = MRI->createVirtualRegister(&AMDGPU::SReg_32RegClass); in mergeWrite2Pair()
1185 BaseReg = MRI->createVirtualRegister(&AMDGPU::VGPR_32RegClass); in mergeWrite2Pair()
1223 Register DestReg = MRI->createVirtualRegister(SuperRC); in mergeImagePair()
1277 Register DestReg = MRI->createVirtualRegister(SuperRC); in mergeSBufferLoadImmPair()
1329 Register DestReg = MRI->createVirtualRegister(SuperRC); in mergeBufferLoadPair()
1390 Register DestReg = MRI->createVirtualRegister(SuperRC); in mergeTBufferLoadPair()
1459 Register SrcReg = MRI->createVirtualRegister(SuperRC); in mergeTBufferStorePair()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DSwiftErrorValueTracking.cpp37 auto VReg = MF->getRegInfo().createVirtualRegister(RC); in getOrCreateVReg()
59 Register VReg = MF->getRegInfo().createVirtualRegister(RC); in getOrCreateVRegDefAt()
133 Register VReg = MF->getRegInfo().createVirtualRegister(RC); in createEntriesInEntryBlock()
243 UpwardsUse ? UUseVReg : MF->getRegInfo().createVirtualRegister(RC); in propagateVRegs()
H A DMIRVRegNamerUtils.cpp139 unsigned VRegRenamer::createVirtualRegister(unsigned VReg) { in createVirtualRegister() function in VRegRenamer
170 return RC ? MRI.createVirtualRegister(RC, LowerName) in createVirtualRegisterWithLowerName()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
H A DPPCRegisterInfo.cpp580 Register Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC); in lowerDynamicAlloc()
669 NegSizeReg = MF.getRegInfo().createVirtualRegister(G8RC); in prepareDynamicAlloca()
677 NegSizeReg = MF.getRegInfo().createVirtualRegister(G8RC); in prepareDynamicAlloca()
686 NegSizeReg = MF.getRegInfo().createVirtualRegister(GPRC); in prepareDynamicAlloca()
694 NegSizeReg = MF.getRegInfo().createVirtualRegister(GPRC); in prepareDynamicAlloca()
790 Register Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC); in lowerCRSpilling()
802 Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC); in lowerCRSpilling()
835 Register Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC); in lowerCRRestore()
847 Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC); in lowerCRRestore()
879 Register Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC); in lowerCRBitSpilling()
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H A DPPCVSXCopy.cpp105 Register NewVReg = MRI.createVirtualRegister(SrcRC); in processBlock()
127 Register NewVReg = MRI.createVirtualRegister(DstRC); in processBlock()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonVExtract.cpp71 Register ElemR = MRI.createVirtualRegister(&Hexagon::IntRegsRegClass); in genElemLoad()
90 Register IdxR = MRI.createVirtualRegister(&Hexagon::IntRegsRegClass); in genElemLoad()
125 Register AddrR = MRI.createVirtualRegister(&Hexagon::IntRegsRegClass); in runOnMachineFunction()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
H A DSystemZCopyPhysRegs.cpp90 Register Tmp = MRI->createVirtualRegister(&SystemZ::GR32BitRegClass); in visitMBB()
100 Register Tmp = MRI->createVirtualRegister(&SystemZ::GR32BitRegClass); in visitMBB()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
H A DRISCVRegisterInfo.cpp237 Register ScratchReg = MRI.createVirtualRegister(&RISCV::GPRRegClass); in eliminateFrameIndex()
262 Register ScratchReg = MRI.createVirtualRegister(&RISCV::GPRRegClass); in eliminateFrameIndex()
284 Register VL = MRI.createVirtualRegister(&RISCV::GPRRegClass); in eliminateFrameIndex()
305 Register VL = MRI.createVirtualRegister(&RISCV::GPRRegClass); in eliminateFrameIndex()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
H A DA15SDOptimizer.cpp420 MRI->createVirtualRegister(QPR ? &ARM::QPRRegClass : &ARM::DPRRegClass); in createDupLane()
435 Register Out = MRI->createVirtualRegister(TRC); in createExtractSubreg()
449 Register Out = MRI->createVirtualRegister(&ARM::QPRRegClass); in createRegSequence()
467 Register Out = MRI->createVirtualRegister(&ARM::DPRRegClass); in createVExt()
479 Register Out = MRI->createVirtualRegister(&ARM::DPR_VFP2RegClass); in createInsertSubreg()
495 Register Out = MRI->createVirtualRegister(&ARM::DPRRegClass); in createImplicitDef()
H A DARMInstructionSelector.cpp550 auto ZeroReg = MRI.createVirtualRegister(&ARM::GPRRegClass); in selectCmp()
560 auto IntermediateRes = MRI.createVirtualRegister(&ARM::GPRRegClass); in selectCmp()
689 auto AddressReg = MRI.createVirtualRegister(&ARM::GPRRegClass); in selectGlobal()
719 auto Offset = MRI.createVirtualRegister(&ARM::GPRRegClass); in selectGlobal()
881 Register AndResult = MRI.createVirtualRegister(&ARM::GPRRegClass); in select()
932 Register IgnoredBits = MRI.createVirtualRegister(&ARM::GPRRegClass); in select()
1103 Register ValueToStore = MRI.createVirtualRegister(&ARM::GPRRegClass); in select()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
H A DInstrEmitter.cpp179 VRBase = MRI->createVirtualRegister(DstRC); in EmitCopyFromReg()
255 VRBase = MRI->createVirtualRegister(RC); in CreateVirtualRegisters()
283 Register VReg = MRI->createVirtualRegister(RC); in getVR()
330 Register NewVReg = MRI->createVirtualRegister(OpRC); in AddRegisterOperand()
397 Register NewVReg = MRI->createVirtualRegister(IIRC); in AddOperand()
466 Register NewReg = MRI->createVirtualRegister(RC); in ConstrainForSubReg()
523 VRBase = MRI->createVirtualRegister(TRC); in EmitSubregNode()
537 VRBase = MRI->createVirtualRegister(TRC); in EmitSubregNode()
575 VRBase = MRI->createVirtualRegister(SRC); in EmitSubregNode()
616 Register NewVReg = MRI->createVirtualRegister(DstRC); in EmitCopyToRegClassNode()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/VE/
H A DVEISelLowering.cpp1808 Register Tmp1 = MRI.createVirtualRegister(RC); in prepareMBB()
1809 Register Tmp2 = MRI.createVirtualRegister(RC); in prepareMBB()
1810 Register Result = MRI.createVirtualRegister(RC); in prepareMBB()
1858 Register Result = MRI.createVirtualRegister(RC); in prepareSymbol()
1872 Register Tmp1 = MRI.createVirtualRegister(RC); in prepareSymbol()
1873 Register Tmp2 = MRI.createVirtualRegister(RC); in prepareSymbol()
1890 Register Tmp1 = MRI.createVirtualRegister(RC); in prepareSymbol()
1891 Register Tmp2 = MRI.createVirtualRegister(RC); in prepareSymbol()
1897 Register Tmp3 = MRI.createVirtualRegister(RC); in prepareSymbol()
1915 Register Tmp1 = MRI.createVirtualRegister(RC); in prepareSymbol()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64AdvSIMDScalarPass.cpp343 Src0 = MRI->createVirtualRegister(&AArch64::FPR64RegClass); in transformInstruction()
349 Src1 = MRI->createVirtualRegister(&AArch64::FPR64RegClass); in transformInstruction()
357 Register Dst = MRI->createVirtualRegister(&AArch64::FPR64RegClass); in transformInstruction()

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