| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| H A D | MipsInstructionSelector.cpp | 152 return constrainSelectedInstRegOperands(*Inst, TII, TRI, RBI); in materialize32BitImm()
158 return constrainSelectedInstRegOperands(*Inst, TII, TRI, RBI); in materialize32BitImm()
165 return constrainSelectedInstRegOperands(*Inst, TII, TRI, RBI); in materialize32BitImm()
173 if (!constrainSelectedInstRegOperands(*LUi, TII, TRI, RBI)) in materialize32BitImm()
175 if (!constrainSelectedInstRegOperands(*ORi, TII, TRI, RBI)) in materialize32BitImm()
266 if (!constrainSelectedInstRegOperands(*NewInst, TII, TRI, RBI)) in buildUnalignedStore()
281 if (!constrainSelectedInstRegOperands(*NewInst, TII, TRI, RBI)) in buildUnalignedLoad()
305 if (!constrainSelectedInstRegOperands(*Mul, TII, TRI, RBI)) in select()
329 if (!constrainSelectedInstRegOperands(*PseudoMULTu, TII, TRI, RBI)) in select()
335 if (!constrainSelectedInstRegOperands(*PseudoMove, TII, TRI, RBI)) in select()
[all …]
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| H A D | MipsLegalizerInfo.cpp | 512 return constrainSelectedInstRegOperands(*Trap, TII, TRI, RBI); in legalizeIntrinsic()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMInstructionSelector.cpp | 584 if (!constrainSelectedInstRegOperands(*CmpI, TII, TRI, RBI)) in insertComparison()
592 if (!constrainSelectedInstRegOperands(*ReadI, TII, TRI, RBI)) in insertComparison()
603 if (!constrainSelectedInstRegOperands(*Mov1I, TII, TRI, RBI)) in insertComparison()
702 if (!constrainSelectedInstRegOperands(*MIBLoad, TII, TRI, RBI)) in selectGlobal()
709 return constrainSelectedInstRegOperands(*MIB, TII, TRI, RBI); in selectGlobal()
716 return constrainSelectedInstRegOperands(*MIB, TII, TRI, RBI); in selectGlobal()
731 if (!constrainSelectedInstRegOperands(*OffsetMIB, TII, TRI, RBI)) in selectGlobal()
742 return constrainSelectedInstRegOperands(*MIB, TII, TRI, RBI); in selectGlobal()
764 return constrainSelectedInstRegOperands(*MIB, TII, TRI, RBI); in selectGlobal()
781 if (!constrainSelectedInstRegOperands(*CmpI, TII, TRI, RBI)) in selectSelect()
[all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 1059 constrainSelectedInstRegOperands(*FCSel, TII, TRI, RBI); in emitSelect()
1208 constrainSelectedInstRegOperands(*SelectInst, TII, TRI, RBI); in emitSelect()
1392 constrainSelectedInstRegOperands(*TestBitMI, TII, TRI, RBI); in emitTestBit()
1454 constrainSelectedInstRegOperands(*BranchMI, TII, TRI, RBI); in emitCBZ()
1611 constrainSelectedInstRegOperands(*TstMI, TII, TRI, RBI); in selectCompareBranch()
1616 return constrainSelectedInstRegOperands(*Bcc, TII, TRI, RBI); in selectCompareBranch()
1703 constrainSelectedInstRegOperands(*Shl, TII, TRI, RBI); in selectVectorSHL()
1760 constrainSelectedInstRegOperands(*Neg, TII, TRI, RBI); in selectVectorAshrLshr()
1762 constrainSelectedInstRegOperands(*SShl, TII, TRI, RBI); in selectVectorAshrLshr()
1786 constrainSelectedInstRegOperands(*MIB, TII, TRI, RBI); in selectVaStartDarwin()
[all …]
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| H A D | AArch64LegalizerInfo.cpp | 1138 constrainSelectedInstRegOperands(*CAS, *ST->getInstrInfo(), in legalizeAtomicCmpxchg128()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86InstructionSelector.cpp | 548 return constrainSelectedInstRegOperands(I, TII, TRI, RBI); in selectLoadStoreOp()
585 return constrainSelectedInstRegOperands(I, TII, TRI, RBI); in selectFrameIndexOrGep()
631 return constrainSelectedInstRegOperands(I, TII, TRI, RBI); in selectGlobalValue()
678 return constrainSelectedInstRegOperands(I, TII, TRI, RBI); in selectConstant()
831 constrainSelectedInstRegOperands(AndInst, TII, TRI, RBI); in selectZext()
936 constrainSelectedInstRegOperands(CmpInst, TII, TRI, RBI); in selectCmp()
937 constrainSelectedInstRegOperands(SetInst, TII, TRI, RBI); in selectCmp()
1003 constrainSelectedInstRegOperands(CmpInst, TII, TRI, RBI); in selectFCmp()
1004 constrainSelectedInstRegOperands(Set1, TII, TRI, RBI); in selectFCmp()
1005 constrainSelectedInstRegOperands(Set2, TII, TRI, RBI); in selectFCmp()
[all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUInstructionSelector.cpp | 297 return constrainSelectedInstRegOperands(I, TII, TRI, RBI); in selectG_AND_OR_XOR()
322 return constrainSelectedInstRegOperands(*Add, TII, TRI, RBI); in selectG_ADD_SUB()
330 return constrainSelectedInstRegOperands(I, TII, TRI, RBI); in selectG_ADD_SUB()
343 return constrainSelectedInstRegOperands(*Add, TII, TRI, RBI); in selectG_ADD_SUB()
383 if (!constrainSelectedInstRegOperands(*Addc, TII, TRI, RBI)) in selectG_ADD_SUB()
420 return constrainSelectedInstRegOperands(I, TII, TRI, RBI); in selectG_UADDO_USUBO_UADDE_USUBE()
673 return constrainSelectedInstRegOperands(*MIB, TII, TRI, RBI); in selectG_BUILD_VECTOR_TRUNC()
677 return constrainSelectedInstRegOperands(MI, TII, TRI, RBI); in selectG_BUILD_VECTOR_TRUNC()
857 return constrainSelectedInstRegOperands(*MIB, TII, TRI, RBI); in selectWritelane()
898 return constrainSelectedInstRegOperands(*MIB, TII, TRI, RBI); in selectDivScale()
[all …]
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| H A D | AMDGPURegisterBankInfo.cpp | 1584 if (!constrainSelectedInstRegOperands(*MIB, *TII, *TRI, *this)) in applyMappingBFEIntrinsic()
1812 if (!constrainSelectedInstRegOperands(*MIB, *TII, *TRI, *this)) in selectStoreIntrinsic()
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | Utils.h | 134 bool constrainSelectedInstRegOperands(MachineInstr &I,
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| H A D | InstructionSelectorImpl.h | 1082 constrainSelectedInstRegOperands(*OutMIs[InsnID].getInstr(), TII, TRI, in executeMatchTable()
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | MachineInstrBuilder.h | 323 return constrainSelectedInstRegOperands(*MI, TII, TRI, RBI); in constrainAllUses()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/ |
| H A D | Utils.cpp | 134 bool llvm::constrainSelectedInstRegOperands(MachineInstr &I, in constrainSelectedInstRegOperands() function in llvm
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