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Searched refs:clk_div (Results 1 – 9 of 9) sorted by relevance

/netbsd-src/sys/arch/arm/amlogic/
H A Dmeson_pwm.c127 u_int period, duty, clk_div, hi, lo; in meson_pwm_get_current() local
135 clk_div = __SHIFTOUT(val, MESON_PWM_MISC_AB_A_CLK_DIV); in meson_pwm_get_current()
142 clk_div = __SHIFTOUT(val, MESON_PWM_MISC_AB_B_CLK_DIV); in meson_pwm_get_current()
153 clk_div += 1; in meson_pwm_get_current()
154 duty_hz = (uint64_t)hi * clk_div; in meson_pwm_get_current()
155 period_hz = (uint64_t)(hi + lo) * clk_div; in meson_pwm_get_current()
181 u_int period, duty, clk_div, hi, lo; in meson_pwm_set_config() local
197 clk_div = 1; in meson_pwm_set_config()
203 clk_div = (period_hz + 0x7fff) / 0xffff; in meson_pwm_set_config()
204 period_hz /= clk_div; in meson_pwm_set_config()
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H A Dmeson_sdhc.c365 const u_int clk_div = __SHIFTOUT(clkc, SD_CLKC_CLK_DIV); in meson_sdhc_default_rx_phase() local
366 const u_int act_freq = pll_freq / clk_div; in meson_sdhc_default_rx_phase()
392 u_int pll_freq, clk_div; in meson_sdhc_set_clock() local
412 clk_div = howmany(pll_freq, freq); in meson_sdhc_set_clock()
414 clkc |= __SHIFTIN(clk_div - 1, SD_CLKC_CLK_DIV); in meson_sdhc_set_clock()
906 u_int ph, rx_phase, clk_div; in meson_sdhc_execute_tuning() local
926 clk_div = __SHIFTOUT(clkc, SD_CLKC_CLK_DIV); in meson_sdhc_execute_tuning()
928 for (ph = 0; ph <= clk_div; ph++) { in meson_sdhc_execute_tuning()
H A Dmeson_sdio.c321 int clk_div; in meson_sdio_set_clock() local
326 clk_div = howmany(pll_freq, freq); in meson_sdio_set_clock()
330 conf |= __SHIFTIN(clk_div - 1, SDIO_CONF_COMMAND_CLK_DIV); in meson_sdio_set_clock()
/netbsd-src/sys/external/bsd/drm2/dist/drm/i915/display/
H A Dintel_dpll_mgr.c1759 struct bxt_clk_div *clk_div) in bxt_ddi_hdmi_pll_dividers() argument
1776 clk_div->p1 = best_clock.p1; in bxt_ddi_hdmi_pll_dividers()
1777 clk_div->p2 = best_clock.p2; in bxt_ddi_hdmi_pll_dividers()
1779 clk_div->n = best_clock.n; in bxt_ddi_hdmi_pll_dividers()
1780 clk_div->m2_int = best_clock.m2 >> 22; in bxt_ddi_hdmi_pll_dividers()
1781 clk_div->m2_frac = best_clock.m2 & ((1 << 22) - 1); in bxt_ddi_hdmi_pll_dividers()
1782 clk_div->m2_frac_en = clk_div->m2_frac != 0; in bxt_ddi_hdmi_pll_dividers()
1784 clk_div->vco = best_clock.vco; in bxt_ddi_hdmi_pll_dividers()
1790 struct bxt_clk_div *clk_div) in bxt_ddi_dp_pll_dividers() argument
1795 *clk_div = bxt_dp_clk_val[0]; in bxt_ddi_dp_pll_dividers()
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/netbsd-src/sys/arch/arm/ti/
H A Dti_lcdc.c160 int clk_div, div, diff, best_diff; in tilcdc_mode_set() local
172 clk_div = 255; in tilcdc_mode_set()
179 clk_div = div; in tilcdc_mode_set()
182 if (clk_div == 255) { in tilcdc_mode_set()
189 (clk_div << CTRL_DIV_SHIFT); in tilcdc_mode_set()
/netbsd-src/sys/dev/ic/
H A Dpl181.c340 u_int pll_freq, clk_div; in plmmc_bus_clock() local
346 clk_div = (howmany(pll_freq, freq) >> 1) - 1; in plmmc_bus_clock()
347 clock |= __SHIFTIN(clk_div, MMCI_CLOCK_CLKDIV); in plmmc_bus_clock()
H A Ddwc_mmc.c392 u_int clk_div, ciu_div; in dwc_mmc_set_clock() local
397 clk_div = howmany(pll_freq, freq * ciu_div); in dwc_mmc_set_clock()
399 clk_div = 0; in dwc_mmc_set_clock()
401 MMC_WRITE(sc, DWC_MMC_CLKDIV, clk_div); in dwc_mmc_set_clock()
/netbsd-src/sys/arch/arm/imx/
H A Dimxi2c.c40 static const struct clk_div { struct
/netbsd-src/sys/dev/acpi/
H A Dnxpiic_acpi.c50 static const struct clk_div { struct