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/netbsd-src/external/mit/libcbor/dist/docs/doxygen/
H A Djquery.js16 …bw()}}}},isFunction:function(b0){return bF.type(b0)==="function"},isArray:Array.isArray||function(… function
23 …bw=by.getText=function(bU){var bS,bT,e=bU.nodeType,bR="";if(e){if(e===1||e===9){if(typeof bU.textC… argument
/netbsd-src/sys/dev/ic/
H A Dld_aac.c176 struct aac_blockwrite *bw; in ld_aac_dobio() local
182 bw = (struct aac_blockwrite *)&fib->data[0]; in ld_aac_dobio()
183 bw->Command = htole32(VM_CtBlockWrite); in ld_aac_dobio()
184 bw->ContainerId = htole32(sc->sc_hwunit); in ld_aac_dobio()
185 bw->BlockNumber = htole32(blkno); in ld_aac_dobio()
186 bw->ByteCount = htole32(datasize); in ld_aac_dobio()
187 bw->Stable = htole32(CUNSTABLE); in ld_aac_dobio()
191 sgt = &bw->SgMap; in ld_aac_dobio()
221 struct aac_blockwrite64 *bw; in ld_aac_dobio() local
227 bw = (struct aac_blockwrite64 *)&fib->data[0]; in ld_aac_dobio()
[all …]
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce110/
H A Damdgpu_dce110_resource.c958 &context->bw_ctx.bw.dce)) in dce110_validate_bandwidth()
968 if (memcmp(&dc->current_state->bw_ctx.bw.dce, in dce110_validate_bandwidth()
969 &context->bw_ctx.bw.dce, sizeof(context->bw_ctx.bw.dce))) { in dce110_validate_bandwidth()
983 context->bw_ctx.bw.dce.nbp_state_change_wm_ns[0].b_mark, in dce110_validate_bandwidth()
984 context->bw_ctx.bw.dce.nbp_state_change_wm_ns[0].a_mark, in dce110_validate_bandwidth()
985 context->bw_ctx.bw.dce.urgent_wm_ns[0].b_mark, in dce110_validate_bandwidth()
986 context->bw_ctx.bw.dce.urgent_wm_ns[0].a_mark, in dce110_validate_bandwidth()
987 context->bw_ctx.bw.dce.stutter_exit_wm_ns[0].b_mark, in dce110_validate_bandwidth()
988 context->bw_ctx.bw.dce.stutter_exit_wm_ns[0].a_mark, in dce110_validate_bandwidth()
989 context->bw_ctx.bw.dce.nbp_state_change_wm_ns[1].b_mark, in dce110_validate_bandwidth()
[all …]
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce112/
H A Damdgpu_dce112_resource.c879 &context->bw_ctx.bw.dce)) in dce112_validate_bandwidth()
887 if (memcmp(&dc->current_state->bw_ctx.bw.dce, in dce112_validate_bandwidth()
888 &context->bw_ctx.bw.dce, sizeof(context->bw_ctx.bw.dce))) { in dce112_validate_bandwidth()
902 context->bw_ctx.bw.dce.nbp_state_change_wm_ns[0].b_mark, in dce112_validate_bandwidth()
903 context->bw_ctx.bw.dce.nbp_state_change_wm_ns[0].a_mark, in dce112_validate_bandwidth()
904 context->bw_ctx.bw.dce.urgent_wm_ns[0].b_mark, in dce112_validate_bandwidth()
905 context->bw_ctx.bw.dce.urgent_wm_ns[0].a_mark, in dce112_validate_bandwidth()
906 context->bw_ctx.bw.dce.stutter_exit_wm_ns[0].b_mark, in dce112_validate_bandwidth()
907 context->bw_ctx.bw.dce.stutter_exit_wm_ns[0].a_mark, in dce112_validate_bandwidth()
908 context->bw_ctx.bw.dce.nbp_state_change_wm_ns[1].b_mark, in dce112_validate_bandwidth()
[all …]
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/
H A Damdgpu_dc_debug.c357 context->bw_ctx.bw.dcn.clk.dispclk_khz, in context_clock_trace()
358 context->bw_ctx.bw.dcn.clk.dppclk_khz, in context_clock_trace()
359 context->bw_ctx.bw.dcn.clk.dcfclk_khz, in context_clock_trace()
360 context->bw_ctx.bw.dcn.clk.dcfclk_deep_sleep_khz, in context_clock_trace()
361 context->bw_ctx.bw.dcn.clk.fclk_khz, in context_clock_trace()
362 context->bw_ctx.bw.dcn.clk.socclk_khz); in context_clock_trace()
365 context->bw_ctx.bw.dcn.clk.dispclk_khz, in context_clock_trace()
366 context->bw_ctx.bw.dcn.clk.dppclk_khz, in context_clock_trace()
367 context->bw_ctx.bw.dcn.clk.dcfclk_khz, in context_clock_trace()
368 context->bw_ctx.bw.dcn.clk.dcfclk_deep_sleep_khz, in context_clock_trace()
[all …]
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dce110/
H A Damdgpu_dce110_clk_mgr.c188 context->bw_ctx.bw.dce.all_displays_in_sync; in dce11_pplib_apply_display_requirements()
190 context->bw_ctx.bw.dce.nbp_state_change_enable == false; in dce11_pplib_apply_display_requirements()
192 context->bw_ctx.bw.dce.cpuc_state_change_enable == false; in dce11_pplib_apply_display_requirements()
194 context->bw_ctx.bw.dce.cpup_state_change_enable == false; in dce11_pplib_apply_display_requirements()
196 context->bw_ctx.bw.dce.blackout_recovery_time_us; in dce11_pplib_apply_display_requirements()
209 pp_display_cfg->min_memory_clock_khz = context->bw_ctx.bw.dce.yclk_khz in dce11_pplib_apply_display_requirements()
215 context->bw_ctx.bw.dce.sclk_khz); in dce11_pplib_apply_display_requirements()
228 = context->bw_ctx.bw.dce.sclk_deep_sleep_khz; in dce11_pplib_apply_display_requirements()
259 int patched_disp_clk = context->bw_ctx.bw.dce.dispclk_khz; in dce11_update_clocks()
274 context->bw_ctx.bw.dce.dispclk_khz = dce_set_clock(clk_mgr_base, patched_disp_clk); in dce11_update_clocks()
/netbsd-src/sys/dev/pci/ixgbe/
H A Dixgbe_dcb.c56 s32 ixgbe_dcb_calculate_tc_credits(u8 *bw, u16 *refill, u16 *max, in ixgbe_dcb_calculate_tc_credits() argument
67 if (bw[i] < min_percent && bw[i]) in ixgbe_dcb_calculate_tc_credits()
68 min_percent = bw[i]; in ixgbe_dcb_calculate_tc_credits()
75 int val = uimin(bw[i] * multiplier, IXGBE_DCB_MAX_CREDIT_REFILL); in ixgbe_dcb_calculate_tc_credits()
81 max[i] = bw[i] ? (bw[i]*IXGBE_DCB_MAX_CREDIT)/100 : min_credit; in ixgbe_dcb_calculate_tc_credits()
317 u8 i, j, bw = 0, bw_id; in ixgbe_dcb_check_config_cee() local
330 bw = p->bwg_percent; in ixgbe_dcb_check_config_cee()
340 if (bw) { in ixgbe_dcb_check_config_cee()
344 } else if (!bw) { in ixgbe_dcb_check_config_cee()
352 bw_sum[i][bw_id] += bw; in ixgbe_dcb_check_config_cee()
[all …]
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/calcs/
H A Damdgpu_dcn_calcs.c555 context->bw_ctx.bw.dcn.watermarks.b.cstate_pstate.cstate_exit_ns =
557 context->bw_ctx.bw.dcn.watermarks.b.cstate_pstate.cstate_enter_plus_exit_ns =
559 context->bw_ctx.bw.dcn.watermarks.b.cstate_pstate.pstate_change_ns =
561 context->bw_ctx.bw.dcn.watermarks.b.pte_meta_urgent_ns = v->ptemeta_urgent_watermark * 1000;
562 context->bw_ctx.bw.dcn.watermarks.b.urgent_ns = v->urgent_watermark * 1000;
569 context->bw_ctx.bw.dcn.watermarks.c.cstate_pstate.cstate_exit_ns =
571 context->bw_ctx.bw.dcn.watermarks.c.cstate_pstate.cstate_enter_plus_exit_ns =
573 context->bw_ctx.bw.dcn.watermarks.c.cstate_pstate.pstate_change_ns =
575 context->bw_ctx.bw.dcn.watermarks.c.pte_meta_urgent_ns = v->ptemeta_urgent_watermark * 1000;
576 context->bw_ctx.bw.dcn.watermarks.c.urgent_ns = v->urgent_watermark * 1000;
[all …]
/netbsd-src/crypto/external/bsd/openssh/dist/
H A Dmisc.c1706 bandwidth_limit_init(struct bwlimit *bw, u_int64_t kbps, size_t buflen) in bandwidth_limit_init() argument
1708 bw->buflen = buflen; in bandwidth_limit_init()
1709 bw->rate = kbps; in bandwidth_limit_init()
1710 bw->thresh = buflen; in bandwidth_limit_init()
1711 bw->lamt = 0; in bandwidth_limit_init()
1712 timerclear(&bw->bwstart); in bandwidth_limit_init()
1713 timerclear(&bw->bwend); in bandwidth_limit_init()
1718 bandwidth_limit(struct bwlimit *bw, size_t read_len) in bandwidth_limit() argument
1723 bw->lamt += read_len; in bandwidth_limit()
1724 if (!timerisset(&bw->bwstart)) { in bandwidth_limit()
[all …]
/netbsd-src/dist/pf/sbin/pfctl/
H A Dpfctl_altq.c146 print_altq(const struct pf_altq *a, unsigned level, struct node_queue_bw *bw, in print_altq() argument
150 print_queue(a, level, bw, 1, qopts); in print_altq()
171 if (bw != NULL && bw->bw_percent > 0) { in print_altq()
172 if (bw->bw_percent < 100) in print_altq()
173 printf("bandwidth %u%% ", bw->bw_percent); in print_altq()
183 print_queue(const struct pf_altq *a, unsigned level, struct node_queue_bw *bw, in print_queue() argument
195 if (bw != NULL && bw->bw_percent > 0) { in print_queue()
196 if (bw->bw_percent < 100) in print_queue()
197 printf("bandwidth %u%% ", bw->bw_percent); in print_queue()
222 eval_pfaltq(struct pfctl *pf, struct pf_altq *pa, struct node_queue_bw *bw, in eval_pfaltq() argument
[all …]
/netbsd-src/usr.sbin/wakeonlan/
H A Dwakeonlan.c167 ssize_t bw, len; in send_wakeup() local
178 bw = 0; in send_wakeup()
180 if ((bw = write(bpf, p, len)) == -1) in send_wakeup()
182 len -= bw; in send_wakeup()
183 p += bw; in send_wakeup()
/netbsd-src/crypto/external/bsd/openssl.old/dist/test/testutil/
H A Dtests.c393 BIGNUM *bw; in test_BN_eq_word() local
397 if ((bw = BN_new()) != NULL) in test_BN_eq_word()
398 BN_set_word(bw, w); in test_BN_eq_word()
399 test_fail_bignum_message(NULL, file, line, "BIGNUM", bns, ws, "==", a, bw); in test_BN_eq_word()
400 BN_free(bw); in test_BN_eq_word()
407 BIGNUM *bw, *aa; in test_BN_abs_eq_word() local
413 if ((bw = BN_new()) != NULL) in test_BN_abs_eq_word()
414 BN_set_word(bw, w); in test_BN_abs_eq_word()
416 aa, bw); in test_BN_abs_eq_word()
417 BN_free(bw); in test_BN_abs_eq_word()
/netbsd-src/games/gomoku/
H A Dbdisp.c124 int bw = (int)strlen(plyr[BLACK]); in bdwho() local
128 int total = fixed + bw + ww; in bdwho()
137 if (bw <= half) in bdwho()
138 ww = remaining - bw; in bdwho()
140 bw = remaining - ww; in bdwho()
142 bw = half, ww = remaining - half; in bdwho()
148 bw, plyr[BLACK], ww, plyr[WHITE]); in bdwho()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
H A Ddce_clk_mgr.c232 if (context->bw_ctx.bw.dce.dispclk_khz > in dce_get_required_clocks_state()
242 < context->bw_ctx.bw.dce.dispclk_khz) in dce_get_required_clocks_state()
620 context->bw_ctx.bw.dce.all_displays_in_sync; in dce11_pplib_apply_display_requirements()
622 context->bw_ctx.bw.dce.nbp_state_change_enable == false; in dce11_pplib_apply_display_requirements()
624 context->bw_ctx.bw.dce.cpuc_state_change_enable == false; in dce11_pplib_apply_display_requirements()
626 context->bw_ctx.bw.dce.cpup_state_change_enable == false; in dce11_pplib_apply_display_requirements()
628 context->bw_ctx.bw.dce.blackout_recovery_time_us; in dce11_pplib_apply_display_requirements()
630 pp_display_cfg->min_memory_clock_khz = context->bw_ctx.bw.dce.yclk_khz in dce11_pplib_apply_display_requirements()
635 context->bw_ctx.bw.dce.sclk_khz); in dce11_pplib_apply_display_requirements()
648 = context->bw_ctx.bw.dce.sclk_deep_sleep_khz; in dce11_pplib_apply_display_requirements()
[all …]
/netbsd-src/external/mit/xorg/bin/xdm/config/
H A DMakefile67 FILES+= xorg-bw.xpm xorg.xpm \
68 NetBSD-bw.xpm NetBSD-inv.xpm NetBSD.xpm \
73 FILESDIR_xorg-bw.xpm= ${X11INCDIR}/X11/pixmaps
78 FILESDIR_NetBSD-bw.xpm= ${X11INCDIR}/X11/pixmaps
/netbsd-src/crypto/external/bsd/openssl/dist/test/testutil/
H A Dtests.c417 BIGNUM *bw; in test_BN_eq_word() local
421 if ((bw = BN_new()) != NULL) in test_BN_eq_word()
422 BN_set_word(bw, w); in test_BN_eq_word()
423 test_fail_bignum_message(NULL, file, line, "BIGNUM", bns, ws, "==", a, bw); in test_BN_eq_word()
424 BN_free(bw); in test_BN_eq_word()
431 BIGNUM *bw, *aa; in test_BN_abs_eq_word() local
437 if ((bw = BN_new()) != NULL) in test_BN_abs_eq_word()
438 BN_set_word(bw, w); in test_BN_abs_eq_word()
440 aa, bw); in test_BN_abs_eq_word()
441 BN_free(bw); in test_BN_abs_eq_word()
/netbsd-src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/disp/
H A Dnouveau_nvkm_engine_disp_dp.c241 ior->dp.nr, ior->dp.bw * 27); in nvkm_dp_train_links()
251 while ((ior->dp.bw * 2700) < nvbios_rd16(bios, lnkcmp)) in nvkm_dp_train_links()
255 while (ior->dp.bw < nvbios_rd08(bios, lnkcmp)) in nvkm_dp_train_links()
279 sink[0] = ior->dp.bw; in nvkm_dp_train_links()
336 u8 bw; member
375 if (cfg->nr <= outp_nr && cfg->bw <= outp_bw) { in nvkm_dp_train()
380 (cfg->nr <= sink_nr && cfg->bw <= sink_bw)) in nvkm_dp_train()
402 failsafe->nr, failsafe->bw * 27); in nvkm_dp_train()
406 if ((cfg->nr > outp_nr || cfg->bw > outp_bw || in nvkm_dp_train()
407 cfg->nr > sink_nr || cfg->bw > sink_bw)) { in nvkm_dp_train()
[all …]
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dcn20/
H A Damdgpu_dcn20_clk_mgr.c121 dppclk_khz = context->res_ctx.pipe_ctx[i].plane_res.bw.dppclk_khz; in dcn20_update_clocks_update_dpp_dto()
123 …prev_dppclk_khz = clk_mgr->base.ctx->dc->current_state->res_ctx.pipe_ctx[i].plane_res.bw.dppclk_kh… in dcn20_update_clocks_update_dpp_dto()
156 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in dcn2_update_clocks()
263 if (new_clocks->dppclk_khz >= dc->current_state->bw_ctx.bw.dcn.clk.dppclk_khz) in dcn2_update_clocks()
282 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in dcn2_update_clocks_fpga()
388 clock_cfg->max_clock_khz = context->bw_ctx.bw.dcn.clk.max_supported_dispclk_khz; in dcn2_get_clock()
391 clock_cfg->bw_requirequired_clock_khz = context->bw_ctx.bw.dcn.clk.bw_dispclk_khz; in dcn2_get_clock()
394 clock_cfg->max_clock_khz = context->bw_ctx.bw.dcn.clk.max_supported_dppclk_khz; in dcn2_get_clock()
397 clock_cfg->bw_requirequired_clock_khz = context->bw_ctx.bw.dcn.clk.bw_dppclk_khz; in dcn2_get_clock()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/
H A Damdgpu_dcn20_resource.c2254 wb_arb_params = &context->bw_ctx.bw.dcn.bw_writeback.mcif_wb_arb[dwb_pipe]; in dcn20_set_mcif_arb_params()
2728 …context->bw_ctx.bw.dcn.watermarks.b.urgent_ns = get_wm_urgent(&context->bw_ctx.dml, pipes, pipe_cn… in dcn20_calculate_wm()
2729 …context->bw_ctx.bw.dcn.watermarks.b.cstate_pstate.cstate_enter_plus_exit_ns = get_wm_stutter_enter… in dcn20_calculate_wm()
2730 …context->bw_ctx.bw.dcn.watermarks.b.cstate_pstate.cstate_exit_ns = get_wm_stutter_exit(&context->b… in dcn20_calculate_wm()
2731 …context->bw_ctx.bw.dcn.watermarks.b.cstate_pstate.pstate_change_ns = get_wm_dram_clock_change(&con… in dcn20_calculate_wm()
2732 …context->bw_ctx.bw.dcn.watermarks.b.pte_meta_urgent_ns = get_wm_memory_trip(&context->bw_ctx.dml, … in dcn20_calculate_wm()
2733 …context->bw_ctx.bw.dcn.watermarks.b.frac_urg_bw_nom = get_fraction_of_urgent_bandwidth(&context->b… in dcn20_calculate_wm()
2734 …context->bw_ctx.bw.dcn.watermarks.b.frac_urg_bw_flip = get_fraction_of_urgent_bandwidth_imm_flip(&… in dcn20_calculate_wm()
2735 …context->bw_ctx.bw.dcn.watermarks.b.urgent_latency_ns = get_urgent_latency(&context->bw_ctx.dml, p… in dcn20_calculate_wm()
2742 …context->bw_ctx.bw.dcn.watermarks.c.urgent_ns = get_wm_urgent(&context->bw_ctx.dml, pipes, pipe_cn… in dcn20_calculate_wm()
[all …]
/netbsd-src/sys/external/bsd/drm2/dist/drm/i915/display/
H A Dintel_bw.c221 int ct, bw; in icl_get_bw_info() local
231 bw = icl_calc_bw(sp->dclk, clpchgroup * 32 * num_channels, ct); in icl_get_bw_info()
234 bw * 9 / 10); /* 90% */ in icl_get_bw_info()
299 unsigned int bw = icl_max_bw(dev_priv, num_planes, i); in intel_max_data_rate() local
301 min_bw = min(bw, min_bw); in intel_max_data_rate()
/netbsd-src/external/gpl3/binutils/dist/opcodes/
H A Di386-opc.tbl1077 <bw:opc:vexw:elem:kcpu:kpfx:cpubmi, +
1109 padd<bw><mmx>, 0x<mmx:pfx>0ffc | <bw:opc>, <mmx:cpu>, Modrm|<mmx:attr>|C|NoSuf, { <mmx:reg>|<mmx:me…
1113 padds<bw><mmx>, 0x<mmx:pfx>0fec | <bw:opc>, <mmx:cpu>, Modrm|<mmx:attr>|C|NoSuf, { <mmx:reg>|<mmx:m…
1114 paddus<bw><mmx>, 0x<mmx:pfx>0fdc | <bw:opc>, <mmx:cpu>, Modrm|<mmx:attr>|C|NoSuf, { <mmx:reg>|<mmx:…
1117 pcmpeq<bw><mmx>, 0x<mmx:pfx>0f74 | <bw:opc>, <mmx:cpu>, Modrm|<mmx:attr>|C|NoSuf, { <mmx:reg>|<mmx:…
1119 pcmpgt<bw><mmx>, 0x<mmx:pfx>0f64 | <bw:opc>, <mmx:cpu>, Modrm|<mmx:attr>|NoSuf|Optimize, { <mmx:reg…
1137 psub<bw><mmx>, 0x<mmx:pfx>0ff8 | <bw:opc>, <mmx:cpu>, Modrm|<mmx:attr>|NoSuf, { <mmx:reg>|<mmx:mem>…
1141 psubs<bw><mmx>, 0x<mmx:pfx>0fe8 | <bw:opc>, <mmx:cpu>, Modrm|<mmx:attr>|NoSuf, { <mmx:reg>|<mmx:mem…
1142 psubus<bw><mmx>, 0x<mmx:pfx>0fd8 | <bw:opc>, <mmx:cpu>, Modrm|<mmx:attr>|NoSuf, { <mmx:reg>|<mmx:me…
1210 pavg<bw>, 0xfe0 | (3 * <bw:opc>), SSE|3dnowA, Modrm|NoSuf, { Qword|Unspecified|BaseIndex|RegMMX, Re…
[all …]
/netbsd-src/sbin/newfs_lfs/
H A Dnewfs.c116 off_t off, bw; in auto_segsize() local
133 bw = off / (finish - start); in auto_segsize()
152 (long)bw, 1000/seeks, seeks); in auto_segsize()
153 final = dbtob(btodb(4 * bw / seeks)); in auto_segsize()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
H A Damdgpu_dcn10_hw_sequencer_debug.c480 dc->current_state->bw_ctx.bw.dcn.clk.dcfclk_khz, in dcn10_get_clock_states()
481 dc->current_state->bw_ctx.bw.dcn.clk.dcfclk_deep_sleep_khz, in dcn10_get_clock_states()
482 dc->current_state->bw_ctx.bw.dcn.clk.dispclk_khz, in dcn10_get_clock_states()
483 dc->current_state->bw_ctx.bw.dcn.clk.dppclk_khz, in dcn10_get_clock_states()
484 dc->current_state->bw_ctx.bw.dcn.clk.fclk_khz, in dcn10_get_clock_states()
485 dc->current_state->bw_ctx.bw.dcn.clk.socclk_khz); in dcn10_get_clock_states()
/netbsd-src/external/bsd/mdocml/dist/
H A Dtbl_term.c589 int bw; /* Box line width. */ in tbl_hrule() local
604 bw = opts & TBL_OPT_DBOX ? (tp->enc == TERMENC_UTF8 ? 2 : 1) : in tbl_hrule()
606 hw = flags == TBL_OPT_DBOX || flags == TBL_OPT_BOX ? bw : in tbl_hrule()
617 (spp == NULL ? 0 : BUP * bw) + in tbl_hrule()
618 (spn == NULL ? 0 : BDOWN * bw) + in tbl_hrule()
703 (spp == NULL ? 0 : BUP * bw) + in tbl_hrule()
704 (spn == NULL ? 0 : BDOWN * bw) + in tbl_hrule()
/netbsd-src/external/lgpl3/gmp/dist/mpn/alpha/ev6/
H A Dsub_n.asm231 cmpult u1, v1, r8 C compute bw from last sub
238 cmpult r2, cy0, cy0 C compute bw from last sub
240 bis r8, cy0, cy0 C combine bw from the two subs
245 cmpult u1, v1, r8 C compute bw from last sub
246 cmpult r2, cy0, cy0 C compute bw from last sub
248 bis r8, cy0, r0 C combine bw from the two subs

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