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Searched refs:buildAnyExt (Results 1 – 10 of 10) sorted by relevance

/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
H A DMipsLegalizerInfo.cpp370 Val = MIRBuilder.buildAnyExt(s32, Val).getReg(0); in legalizeCustom()
372 Val = MIRBuilder.buildAnyExt(s64, Val).getReg(0); in legalizeCustom()
H A DMipsCallLowering.cpp302 return MIRBuilder.buildAnyExt(LocTy, ValReg).getReg(0); in extendRegister()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DAMDGPUPostLegalizerCombiner.cpp242 CvtSrc = B.buildAnyExt(S32, CvtSrc).getReg(0); in applyCvtF32UByteN()
H A DAMDGPUCallLowering.cpp38 return Handler.MIRBuilder.buildAnyExt(LLT::scalar(32), ValVReg).getReg(0); in extendRegisterMin32()
H A DAMDGPULegalizerInfo.cpp3593 WideRegs.push_back(B.buildAnyExt(S32, Unmerge.getReg(I)).getReg(0)); in handleD16VData()
3644 Register AnyExt = B.buildAnyExt(LLT::scalar(32), VData).getReg(0); in fixStoreSourceType()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/
H A DCallLowering.cpp472 B.buildAnyExt(DstRegs[i], UnmergeToEltTy.getReg(i)); in buildCopyToRegs()
1075 auto MIB = MIRBuilder.buildAnyExt(LocTy, ValReg); in extendRegister()
H A DInlineAsmLowering.cpp266 Src = MIRBuilder.buildAnyExt(LLT::scalar(DstSize), Src).getReg(0); in buildAnyextOrCopy()
H A DLegalizerHelper.cpp805 MIRBuilder.buildAnyExt(DstReg, ImplicitReg); in narrowScalar()
906 MIRBuilder.buildAnyExt(DstReg, TmpReg); in narrowScalar()
1527 SrcReg = MIRBuilder.buildAnyExt(WideTy, SrcReg).getReg(0); in widenScalarUnmergeValues()
1556 WideSrc = MIRBuilder.buildAnyExt(LCMTy, WideSrc).getReg(0); in widenScalarUnmergeValues()
1662 Src = MIRBuilder.buildAnyExt(WideTy, Src); in widenScalarExtract()
1809 auto LHS = MIRBuilder.buildAnyExt(WideTy, MI.getOperand(1)); in widenScalarAddSubShlSat()
1811 : MIRBuilder.buildAnyExt(WideTy, MI.getOperand(2)); in widenScalarAddSubShlSat()
2829 auto ExtVal = MIRBuilder.buildAnyExt(ExtendTy, SrcReg); in lowerStore()
H A DMachineIRBuilder.cpp416 MachineInstrBuilder MachineIRBuilder::buildAnyExt(const DstOp &Res, in buildAnyExt() function in MachineIRBuilder
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/GlobalISel/
H A DMachineIRBuilder.h602 MachineInstrBuilder buildAnyExt(const DstOp &Res, const SrcOp &Op);