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/netbsd-src/external/gpl3/gdb/dist/gdb/testsuite/gdb.disasm/
H A Dt10_and.s8 and.b #0x12:8,r1h ;e112
9 and.b #0x12:8,@er1 ;7d10e012
10 and.b #0x12:8,@(0x3:2,er1) ;01776818e012
11 and.b #0x12:8,@er1+ ;01746c18e012
12 and.b #0x12:8,@-er1 ;01776c18e012
13 and.b #0x12:8,@+er1 ;01756c18e012
14 and.b #0x12:8,@er1- ;01766c18e012
15 and.b #0x12:8,@(0x1234:16,er1) ;01746e181234e012
16 and.b #0x12:8,@(0x12345678:32,er1) ;78146a2812345678e012
17 and.b #0x12:8,@(0x1234:16,r2l.b) ;01756e281234e012
[all …]
/netbsd-src/external/mit/isl/dist/test_inputs/codegen/cloog/
H A Dsor1d.st1 …and i4 >= -193 - 200i1 and i4 >= -194 + 100i0 - 200i1 and 100i0 >= -284 - 3N and i4 <= -1 + N and …
3 context: "[M, N] -> { [] : M >= 0 and N >= 0 }"
H A Dmxm-shared.st1 …and g4 = 0 and g2 = 8b0 and 128e0 = g1 and 4096e1 = 128b1 - g1 and 128e2 = -8b0 + g0 and 16e3 = -t…
3 …and g3 = 128b1 and 8e0 = g0 and 4096e1 = -128b1 + g1 and 128e2 = 8b0 - g0 and b0 >= 0 and g4 <= -1…
H A Djacobi-shared.st1 …and 2e0 = -1 + h0 and 2048e1 = -32b0 + g1 and 1024e2 = -32b1 + g2 and 16e3 = -15 - t0 + i0 and 32e…
3 …and 2048e0 = -32b0 + g1 and 1024e1 = -32b1 + g2 and g2 <= -2 + N and g2 >= -29 and g1 <= -2 + N an…
H A Dotl.st1 …and innerProcTileIter1 >= outerTimeTileIter - outerProcTileIter2 and 10outerProcTileIter2 >= -2 - …
3 context: "[M, N] -> { [] : M >= 1 and N >= 1 }"
/netbsd-src/external/mit/isl/dist/test_inputs/codegen/
H A Droman.in3 …and 4294967296e0 <= np1 - i and 4294967296e0 >= -4294967295 + np1 - i and 4294967296e0 <= np1 - i …
4 … 4294967296e0 <= np1 - i and 4294967296e0 >= -20 + np1 - i and np1 >= -2147483648 and np1 <= 21474…
H A Dredundant.st2 …and o1 >= 0 and o2 <= 12 and o2 >= 1 and o3 <= 14 and o3 >= 1 and 8e0 <= 4 + o2 and 8e1 <= 5 + o2 …
4 context: "[b0] -> { [] : b0 <= 2 and b0 >= 0 }"
H A Dshift2.in3 …and 32e0 = o2 and 32e1 = o3 and 32e2 = -length + o5 and 32e3 = -2length + o6 and o2 <= length and …
4 [tsteps, length] -> { : length >= 0 and length <= 1024 and tsteps = 2 }
H A Dseparate2.in2 …and 32e0 = o2 and 32e1 = o3 and 32e2 = -i + o5 and 32e3 = -31 + j - o6 and o2 <= i and o2 >= -31 +…
3 [tsteps, length] -> { : length >= 1 and length <= 1024 and tsteps = 2 }
/netbsd-src/external/gpl3/gcc/dist/gcc/config/i386/
H A Dbtver2.md5 ;; GCC is free software; you can redistribute it and/or modify
22 ;; double (fast path double) and vector instructions.
23 ;; Direct instrucions are decoded and convereted into 1 cop
24 ;; Double instrucions are decoded and converetd into 2 cops
25 ;; Vector instrucions are microcoded and they generated converted to
65 ;; There are 2 AGU pipes one for load and one for store.
73 ;; MUL and DIV operations can take place in to ALU pipe1.
99 (and (eq_attr "cpu" "btver2")
107 (and (eq_attr "cpu" "btver2")
108 (and (eq_attr "memory" "load")
[all …]
H A Dznver.md5 ;; GCC is free software; you can redistribute it and/or modify
24 ;; AMD znver1, znver2 and znver3 Scheduling
26 ;; AGU pipes and floating point execution units.
29 ;; Decoders unit has 4 decoders and all of them can decode fast path
30 ;; and vector type instructions.
55 ;; 2 AGU pipes in znver1 and 3 AGU pipes in znver2 and znver3
66 ;; Store operations differs between znver1, znver2 and znver3 because extra AGU
98 (and (eq_attr "cpu" "znver1")
103 (and (eq_attr "cpu" "znver2,znver3")
109 (and (eq_attr "cpu" "znver1")
[all …]
H A Dznver4.md5 ;; GCC is free software; you can redistribute it and/or modify
26 ;; AGU pipes, branch, floating point execution and fp store units.
29 ;; Decoders unit has 4 decoders and all of them can decode fast path
30 ;; and vector type instructions.
88 ;; Separate fp store and fp-to-int store. Although there are 2 store pipes, the
97 (and (eq_attr "cpu" "znver4")
98 (and (eq_attr "znver1_decode" "double")
99 (and (eq_attr "type" "imov")
104 (and (eq_attr "cpu" "znver4")
105 (and (eq_attr "znver1_decode" "double")
[all …]
H A Dslm.md6 ;; GCC is free software; you can redistribute it and/or modify
20 ;; Silvermont has 2 out-of-order IEC, 2 in-order FEC and 1 in-order MEC.
28 ;; SLM has two ports: port 0 and port 1 connecting to all execution units
40 ;; Some EUs have duplicated copied and can be accessed via either
71 ;;; issue in port 0, some in port 0 and some in either port.
76 ;;; Complex macro-instruction has variants of latency, and uses both ports.
80 (and (eq_attr "cpu" "slm")
81 (and (eq_attr "type" "other")
87 (and (eq_attr "cpu" "slm")
88 (and (eq_attr "type" "other")
[all …]
/netbsd-src/external/gpl3/gcc.old/dist/gcc/config/i386/
H A Dbtver2.md5 ;; GCC is free software; you can redistribute it and/or modify
22 ;; double (fast path double) and vector instructions.
23 ;; Direct instrucions are decoded and convereted into 1 cop
24 ;; Double instrucions are decoded and converetd into 2 cops
25 ;; Vector instrucions are microcoded and they generated converted to
65 ;; There are 2 AGU pipes one for load and one for store.
73 ;; MUL and DIV operations can take place in to ALU pipe1.
99 (and (eq_attr "cpu" "btver2")
107 (and (eq_attr "cpu" "btver2")
108 (and (eq_attr "memory" "load")
[all …]
H A Dznver1.md5 ;; GCC is free software; you can redistribute it and/or modify
24 ;; AMD znver1, znver2 and znver3 Scheduling
26 ;; AGU pipes and floating point execution units.
29 ;; Decoders unit has 4 decoders and all of them can decode fast path
30 ;; and vector type instructions.
55 ;; 2 AGU pipes in znver1 and 3 AGU pipes in znver2 and znver3
66 ;; Store operations differs between znver1, znver2 and znver3 because extra AGU
98 (and (eq_attr "cpu" "znver1")
103 (and (eq_attr "cpu" "znver2,znver3")
109 (and (eq_attr "cpu" "znver1")
[all …]
H A Dslm.md6 ;; GCC is free software; you can redistribute it and/or modify
20 ;; Silvermont has 2 out-of-order IEC, 2 in-order FEC and 1 in-order MEC.
28 ;; SLM has two ports: port 0 and port 1 connecting to all execution units
40 ;; Some EUs have duplicated copied and can be accessed via either
71 ;;; issue in port 0, some in port 0 and some in either port.
76 ;;; Complex macro-instruction has variants of latency, and uses both ports.
80 (and (eq_attr "cpu" "slm")
81 (and (eq_attr "type" "other")
87 (and (eq_attr "cpu" "slm")
88 (and (eq_attr "type" "other")
[all …]
/netbsd-src/external/gpl3/gcc/dist/gcc/config/c6x/
H A Dc6x-sched.md13 ;; GCC is free software; you can redistribute it and/or modify
29 ;; machine, and a correspondingly with "a" or "b". n and
30 ;; are replaced with yes/no and the appropriate reservation.
33 (and (eq_attr "type" "load")
34 (and (eq_attr "cross" "n")
35 (and (eq_attr "units" "d_addr")
40 (and (eq_attr "type" "store")
41 (and (eq_attr "cross" "n")
42 (and (eq_attr "units" "d_addr")
47 (and (eq_attr "type" "loadn")
[all …]
H A Dc6x-sched.md.in8 ;; GCC is free software; you can redistribute it and/or modify
24 ;; machine, and _RF_ correspondingly with "a" or "b". _CROSS_ and
25 ;; _CUNIT_ are replaced with yes/no and the appropriate reservation.
28 (and (eq_attr "type" "load")
29 (and (eq_attr "cross" "_CROSS_")
30 (and (eq_attr "units" "d_addr")
35 (and (eq_attr "type" "store")
36 (and (eq_attr "cross" "_CROSS_")
37 (and (eq_attr "units" "d_addr")
42 (and (eq_attr "type" "loadn")
[all …]
/netbsd-src/external/gpl3/gcc.old/dist/gcc/config/c6x/
H A Dc6x-sched.md13 ;; GCC is free software; you can redistribute it and/or modify
29 ;; machine, and a correspondingly with "a" or "b". n and
30 ;; are replaced with yes/no and the appropriate reservation.
33 (and (eq_attr "type" "load")
34 (and (eq_attr "cross" "n")
35 (and (eq_attr "units" "d_addr")
40 (and (eq_attr "type" "store")
41 (and (eq_attr "cross" "n")
42 (and (eq_attr "units" "d_addr")
47 (and (eq_attr "type" "loadn")
[all …]
H A Dc6x-sched.md.in8 ;; GCC is free software; you can redistribute it and/or modify
24 ;; machine, and _RF_ correspondingly with "a" or "b". _CROSS_ and
25 ;; _CUNIT_ are replaced with yes/no and the appropriate reservation.
28 (and (eq_attr "type" "load")
29 (and (eq_attr "cross" "_CROSS_")
30 (and (eq_attr "units" "d_addr")
35 (and (eq_attr "type" "store")
36 (and (eq_attr "cross" "_CROSS_")
37 (and (eq_attr "units" "d_addr")
42 (and (eq_attr "type" "loadn")
[all …]
/netbsd-src/external/mit/isl/dist/test_inputs/schedule/
H A Dpoliwoda.sc9 domain: [_PB_M, _PB_N] -> { S_0[Id1, Id2, Id3] : _PB_M >= 2 and Id1 >=
10 0 and 4Id1 < _PB_N and 2Id2 >= -_PB_M and 4Id2 <= -_PB_M and Id3 <=
11 0 and 4Id3 >= -3 + _PB_M + 4Id2 and 4Id3 >= -1 - _PB_M; S_1[Id1, Id2,
12 Id3] : _PB_M >= 2 and Id1 >= 0 and 4Id1 < _PB_N and -_PB_M <= 2Id2 <=
13 1 - _PB_M and Id3 <= 0 and 4Id3 >= -1 - _PB_M }
15 Id3'] : Id1 >= 0 and 4Id1 < _PB_N and Id3 <= 0 and 4Id3 >= -3 + _PB_M +
16 4Id2 and Id2' <= Id2 and 2Id2' >= -_PB_M and Id3' < 0 and Id3' <= Id3
17 and Id3' < Id2 + Id3 - Id2' and 4Id3' >= -4 + _PB_M + 4Id2 and 4Id3' >=
18 -3 + _PB_M + 3Id2 + Id2' and -1 - _PB_M <= 4Id3' <= 2 + _PB_M + 4Id2;
19 S_0[Id1, Id2, Id3] -> S_0[Id1' = Id1, Id2', Id3' = Id3] : Id1 >= 0 and
[all …]
/netbsd-src/external/gpl3/gcc.old/dist/gcc/config/m68k/
H A Dcf.md1 ;; ColdFire V1, V2, V3 and V4/V4e DFA description.
7 ;; GCC is free software; you can redistribute it and/or modify
46 (and (eq_attr "cpu" "cfv1,cfv2,cfv3")
68 ;; subscribed and adjust number of prefetched instruction words accordingly.
132 ;; Load from a memory location and store to a memory location.
146 ;; Load from an indexed location and store to a memory location.
160 ;; Load from a memory location and store to an indexed location.
302 ;; ??? pushing and poping return address to and from the stack.
338 (and (and (and (eq_attr "cpu" "cfv1,cfv2,cfv3")
348 (and (and (and (eq_attr "cpu" "cfv1,cfv2,cfv3")
[all …]
/netbsd-src/external/gpl3/gcc/dist/gcc/config/m68k/
H A Dcf.md1 ;; ColdFire V1, V2, V3 and V4/V4e DFA description.
7 ;; GCC is free software; you can redistribute it and/or modify
46 (and (eq_attr "cpu" "cfv1,cfv2,cfv3")
68 ;; subscribed and adjust number of prefetched instruction words accordingly.
132 ;; Load from a memory location and store to a memory location.
146 ;; Load from an indexed location and store to a memory location.
160 ;; Load from a memory location and store to an indexed location.
302 ;; ??? pushing and poping return address to and from the stack.
338 (and (and (and (eq_attr "cpu" "cfv1,cfv2,cfv3")
348 (and (and (and (eq_attr "cpu" "cfv1,cfv2,cfv3")
[all …]
/netbsd-src/crypto/external/bsd/openssl/lib/libcrypto/arch/powerpc/
H A Dsha512-ppc.S133 and 5,6,12
146 and 5,8,9
147 and 0,8,10
151 and 0,9,10
162 and 5,12,11
175 and 5,15,8
176 and 0,15,9
180 and 0,8,9
191 and 5,11,10
204 and 5,14,15
[all …]
/netbsd-src/crypto/external/bsd/openssl/lib/libcrypto/arch/powerpc64/
H A Dsha256-ppc.S133 and 5,6,12
146 and 5,8,9
147 and 0,8,10
151 and 0,9,10
162 and 5,12,11
175 and 5,15,8
176 and 0,15,9
180 and 0,8,9
191 and 5,11,10
204 and 5,14,15
[all …]

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