/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
H A D | MipsMachineFunction.cpp | 80 MF.getRegInfo().addLiveIn(Mips::T9_64); in initGlobalBaseReg() 81 MBB.addLiveIn(Mips::T9_64); in initGlobalBaseReg() 108 MF.getRegInfo().addLiveIn(Mips::T9); in initGlobalBaseReg() 109 MBB.addLiveIn(Mips::T9); in initGlobalBaseReg() 143 MF.getRegInfo().addLiveIn(Mips::V0); in initGlobalBaseReg() 144 MBB.addLiveIn(Mips::V0); in initGlobalBaseReg()
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H A D | MipsSEFrameLowering.cpp | 510 MBB.addLiveIn(ABI.GetEhDataReg(I)); in emitPrologue() 597 MBB.addLiveIn(Mips::COP013); in emitInterruptPrologueStub() 611 MBB.addLiveIn(Mips::COP014); in emitInterruptPrologueStub() 622 MBB.addLiveIn(Mips::COP012); in emitInterruptPrologueStub() 809 MBB.addLiveIn(Reg); in spillCalleeSavedRegisters()
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H A D | Mips16FrameLowering.cpp | 132 MBB.addLiveIn(Reg); in spillCalleeSavedRegisters()
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H A D | MipsCallLowering.cpp | 110 MIRBuilder.getMRI()->addLiveIn(PhysReg); in markPhysRegUsed() 111 MIRBuilder.getMBB().addLiveIn(PhysReg); in markPhysRegUsed() 484 MIRBuilder.getMBB().addLiveIn(ArgRegs[I]); in lowerFormalArguments()
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/netbsd-src/external/apache2/llvm/dist/llvm/tools/llvm-exegesis/lib/ |
H A D | SnippetRepetitor.cpp | 76 Loop.MBB->addLiveIn(LoopCounter); in Repeat() 78 Loop.MBB->addLiveIn(Reg); in Repeat() 80 Loop.MBB->addLiveIn(LiveIn); in Repeat()
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H A D | Assembler.cpp | 196 MF.getRegInfo().addLiveIn(Reg); in assembleToStream() 205 Entry.MBB->addLiveIn(Reg); in assembleToStream()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
H A D | SILowerSGPRSpills.cpp | 193 EntryBB.addLiveIn(CSIReg.getReg()); in updateLiveness() 285 MBB.addLiveIn(LowestAvailableVGPR); in lowerShiftReservedVGPR() 392 MBB.addLiveIn(SSpill.VGPR); in runOnMachineFunction() 395 MBB.addLiveIn(Reg); in runOnMachineFunction() 398 MBB.addLiveIn(Reg); in runOnMachineFunction()
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H A D | SIFrameLowering.cpp | 178 MF->getRegInfo().addLiveIn(GitPtrLo); in buildGitPtr() 179 MBB.addLiveIn(GitPtrLo); in buildGitPtr() 264 MRI.addLiveIn(FlatScratchInitReg); in emitEntryFunctionFlatScratchInit() 265 MBB.addLiveIn(FlatScratchInitReg); in emitEntryFunctionFlatScratchInit() 433 OtherBB.addLiveIn(ScratchRsrcReg); in emitEntryFunctionPrologue() 447 MRI.addLiveIn(PreloadedScratchRsrcReg); in emitEntryFunctionPrologue() 448 MBB.addLiveIn(PreloadedScratchRsrcReg); in emitEntryFunctionPrologue() 498 MRI.addLiveIn(PreloadedScratchWaveOffsetReg); in emitEntryFunctionPrologue() 499 MBB.addLiveIn(PreloadedScratchWaveOffsetReg); in emitEntryFunctionPrologue() 600 MF.getRegInfo().addLiveIn(MFI->getImplicitBufferPtrUserSGPR()); in emitEntryFunctionScratchRsrcRegSetup() [all …]
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H A D | AMDGPUCallLowering.cpp | 151 MIRBuilder.getMBB().addLiveIn(PhysReg); in markPhysRegUsed() 387 Register LiveInReturn = MF.addLiveIn(TRI->getReturnAddressReg(MF), in lowerReturn() 444 MF.addLiveIn(PrivateSegmentBufferReg, &AMDGPU::SGPR_128RegClass); in allocateHSAUserSGPRs() 450 MF.addLiveIn(DispatchPtrReg, &AMDGPU::SGPR_64RegClass); in allocateHSAUserSGPRs() 456 MF.addLiveIn(QueuePtrReg, &AMDGPU::SGPR_64RegClass); in allocateHSAUserSGPRs() 465 MRI.addLiveIn(InputPtrReg, VReg); in allocateHSAUserSGPRs() 466 B.getMBB().addLiveIn(InputPtrReg); in allocateHSAUserSGPRs() 473 MF.addLiveIn(DispatchIDReg, &AMDGPU::SGPR_64RegClass); in allocateHSAUserSGPRs() 479 MF.addLiveIn(FlatScratchInitReg, &AMDGPU::SGPR_64RegClass); in allocateHSAUserSGPRs() 595 Register LiveInReturn = MF.addLiveIn(ReturnAddrReg, in lowerFormalArguments() [all …]
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
H A D | X86IndirectThunks.cpp | 97 MF.front().addLiveIn(X86::R11); in populateThunk() 217 Entry->addLiveIn(ThunkReg); in populateThunk() 239 CallTarget->addLiveIn(ThunkReg); in populateThunk()
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H A D | X86FrameLowering.cpp | 890 RoundMBB->addLiveIn(FinalReg); in emitStackProbeInlineWindowsCoreCLR64() 907 LoopMBB->addLiveIn(JoinReg); in emitStackProbeInlineWindowsCoreCLR64() 920 LoopMBB->addLiveIn(RoundedReg); in emitStackProbeInlineWindowsCoreCLR64() 942 ContinueMBB->addLiveIn(SizeReg); in emitStackProbeInlineWindowsCoreCLR64() 1442 MBB.addLiveIn(Establisher); in emitPrologue() 1502 MBB.addLiveIn(X86::R14); in emitPrologue() 1707 MBB.addLiveIn(Establisher); in emitPrologue() 2531 MBB.addLiveIn(Reg); in spillCalleeSavedRegisters() 2567 MBB.addLiveIn(Reg); in spillCalleeSavedRegisters() 2783 allocMBB->addLiveIn(LI); in adjustForSegmentedStacks() [all …]
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H A D | X86CallLowering.cpp | 218 MIRBuilder.getMRI()->addLiveIn(PhysReg); in markPhysRegUsed() 219 MIRBuilder.getMBB().addLiveIn(PhysReg); in markPhysRegUsed()
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H A D | X86CmovConversion.cpp | 679 FalseMBB->addLiveIn(X86::EFLAGS); in convertCmovInstsToBranches() 680 SinkMBB->addLiveIn(X86::EFLAGS); in convertCmovInstsToBranches()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
H A D | SystemZPostRewrite.cpp | 182 RestMBB->addLiveIn(*I); in expandCondMove() 187 MoveMBB->addLiveIn(SrcReg); in expandCondMove() 189 MoveMBB->addLiveIn(*I); in expandCondMove()
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H A D | SystemZFrameLowering.cpp | 195 MBB.addLiveIn(GPR64); in addSavedGPR() 245 MBB.addLiveIn(Reg); in spillCalleeSavedRegisters() 250 MBB.addLiveIn(Reg); in spillCalleeSavedRegisters() 534 I->addLiveIn(SystemZ::R11D); in emitPrologue()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/MSP430/ |
H A D | MSP430FrameLowering.cpp | 76 I->addLiveIn(MSP430::R4); in emitPrologue() 196 MBB.addLiveIn(Reg); in spillCalleeSavedRegisters()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/ |
H A D | SparcFrameLowering.cpp | 352 MBB->addLiveIn(reg - SP::I0_I1 + SP::O0_O1); in remapRegsForLeafProc() 358 MBB->addLiveIn(reg - SP::I0 + SP::O0); in remapRegsForLeafProc()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/XCore/ |
H A D | XCoreFrameLowering.cpp | 263 MBB.addLiveIn(XCore::LR); in emitPrologue() 288 MBB.addLiveIn(SpillList[i].Reg); in emitPrologue() 436 MBB.addLiveIn(Reg); in spillCalleeSavedRegisters()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
H A D | HexagonCFGOptimizer.cpp | 231 LayoutSucc->addLiveIn(NewLI); in runOnMachineFunction()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64CallLowering.cpp | 200 MIRBuilder.getMRI()->addLiveIn(PhysReg); in markPhysRegUsed() 201 MIRBuilder.getMBB().addLiveIn(PhysReg); in markPhysRegUsed() 497 Register X8VReg = MF.addLiveIn(AArch64::X8, &AArch64::GPR64RegClass); in handleMustTailForwardedRegisters() 503 MBB.addLiveIn(F.PReg); in handleMustTailForwardedRegisters()
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/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
H A D | MachineBasicBlock.h | 367 void addLiveIn(MCRegister PhysReg, 371 void addLiveIn(const RegisterMaskPair &RegMaskPair) { 386 Register addLiveIn(MCRegister PhysReg, const TargetRegisterClass *RC);
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AVR/ |
H A D | AVRFrameLowering.cpp | 111 I->addLiveIn(AVR::R29R28); in emitPrologue() 257 MBB.addLiveIn(Reg); in spillCalleeSavedRegisters()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
H A D | ImplicitNullChecks.cpp | 789 MBB->addLiveIn(Reg); in rewriteNullChecks() 797 NC.getNotNullSucc()->addLiveIn(MO.getReg()); in rewriteNullChecks()
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H A D | VirtRegMap.cpp | 318 MBB->addLiveIn(PhysReg, LaneMask); in addLiveInsForSubRanges() 353 MBB->addLiveIn(PhysReg); in addMBBLiveIns()
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H A D | MachineRegisterInfo.cpp | 485 EntryMBB->addLiveIn(LiveIns[i].first); in EmitLiveInCopies() 489 EntryMBB->addLiveIn(LiveIns[i].first); in EmitLiveInCopies()
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