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Searched refs:acr (Results 1 – 25 of 99) sorted by relevance

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/netbsd-src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/acr/
H A Dnouveau_nvkm_subdev_acr_base.c34 nvkm_acr_hsf_find(struct nvkm_acr *acr, const char *name) in nvkm_acr_hsf_find() argument
37 list_for_each_entry(hsf, &acr->hsf, head) { in nvkm_acr_hsf_find()
45 nvkm_acr_hsf_boot(struct nvkm_acr *acr, const char *name) in nvkm_acr_hsf_boot() argument
47 struct nvkm_subdev *subdev = &acr->subdev; in nvkm_acr_hsf_boot()
51 hsf = nvkm_acr_hsf_find(acr, name); in nvkm_acr_hsf_boot()
60 ret = hsf->func->boot(acr, hsf); in nvkm_acr_hsf_boot()
72 nvkm_acr_unload(struct nvkm_acr *acr) in nvkm_acr_unload() argument
74 if (acr->done) { in nvkm_acr_unload()
75 nvkm_acr_hsf_boot(acr, "unload"); in nvkm_acr_unload()
76 acr->done = false; in nvkm_acr_unload()
[all …]
H A Dnouveau_nvkm_subdev_acr_gp102.c40 gp102_acr_wpr_patch(struct nvkm_acr *acr, s64 adjust) in gp102_acr_wpr_patch() argument
48 nvkm_robj(acr->wpr, offset, &hdr, sizeof(hdr)); in gp102_acr_wpr_patch()
49 wpr_header_v1_dump(&acr->subdev, &hdr); in gp102_acr_wpr_patch()
51 list_for_each_entry(lsfw, &acr->lsfw, head) { in gp102_acr_wpr_patch()
55 nvkm_robj(acr->wpr, hdr.lsb_offset, &lsb, sizeof(lsb)); in gp102_acr_wpr_patch()
56 lsb_header_v1_dump(&acr->subdev, &lsb); in gp102_acr_wpr_patch()
58 lsfw->func->bld_patch(acr, lsb.tail.bl_data_off, adjust); in gp102_acr_wpr_patch()
67 gp102_acr_wpr_build_lsb(struct nvkm_acr *acr, struct nvkm_acr_lsfw *lsfw) in gp102_acr_wpr_build_lsb() argument
77 nvkm_wobj(acr->wpr, lsfw->offset.lsb, &hdr, sizeof(hdr)); in gp102_acr_wpr_build_lsb()
82 gp102_acr_wpr_build(struct nvkm_acr *acr, struct nvkm_acr_lsf *rtos) in gp102_acr_wpr_build() argument
[all …]
H A Dnouveau_nvkm_subdev_acr_gm200.c43 gm200_acr_init(struct nvkm_acr *acr) in gm200_acr_init() argument
45 return nvkm_acr_hsf_boot(acr, "load"); in gm200_acr_init()
49 gm200_acr_wpr_check(struct nvkm_acr *acr, u64 *start, u64 *limit) in gm200_acr_wpr_check() argument
51 struct nvkm_device *device = acr->subdev.device; in gm200_acr_wpr_check()
61 gm200_acr_wpr_patch(struct nvkm_acr *acr, s64 adjust) in gm200_acr_wpr_patch() argument
63 struct nvkm_subdev *subdev = &acr->subdev; in gm200_acr_wpr_patch()
70 nvkm_robj(acr->wpr, offset, &hdr, sizeof(hdr)); in gm200_acr_wpr_patch()
73 list_for_each_entry(lsfw, &acr->lsfw, head) { in gm200_acr_wpr_patch()
77 nvkm_robj(acr->wpr, hdr.lsb_offset, &lsb, sizeof(lsb)); in gm200_acr_wpr_patch()
80 lsfw->func->bld_patch(acr, lsb.tail.bl_data_off, adjust); in gm200_acr_wpr_patch()
[all …]
H A Dnouveau_nvkm_subdev_acr_gm20b.c38 gm20b_acr_wpr_alloc(struct nvkm_acr *acr, u32 wpr_size) in gm20b_acr_wpr_alloc() argument
40 struct nvkm_subdev *subdev = &acr->subdev; in gm20b_acr_wpr_alloc()
42 acr->func->wpr_check(acr, &acr->wpr_start, &acr->wpr_end); in gm20b_acr_wpr_alloc()
44 if ((acr->wpr_end - acr->wpr_start) < wpr_size) { in gm20b_acr_wpr_alloc()
50 wpr_size, 0, true, &acr->wpr); in gm20b_acr_wpr_alloc()
54 gm20b_acr_load_bld(struct nvkm_acr *acr, struct nvkm_acr_hsf *hsf) in gm20b_acr_load_bld() argument
68 flcn_bl_dmem_desc_dump(&acr->subdev, &hsdesc); in gm20b_acr_load_bld()
74 gm20b_acr_load_load(struct nvkm_acr *acr, struct nvkm_acr_hsfw *hsfw) in gm20b_acr_load_load() argument
78 desc->ucode_blob_base = nvkm_memory_addr(acr->wpr); in gm20b_acr_load_load()
79 desc->ucode_blob_size = nvkm_memory_size(acr->wpr); in gm20b_acr_load_load()
[all …]
H A Dnouveau_nvkm_subdev_acr_tu102.c38 tu102_acr_init(struct nvkm_acr *acr) in tu102_acr_init() argument
40 int ret = nvkm_acr_hsf_boot(acr, "AHESASC"); in tu102_acr_init()
44 return nvkm_acr_hsf_boot(acr, "ASB"); in tu102_acr_init()
48 tu102_acr_wpr_build(struct nvkm_acr *acr, struct nvkm_acr_lsf *rtos) in tu102_acr_wpr_build() argument
55 nvkm_wo32(acr->wpr, 0x200, 0xffffffff); in tu102_acr_wpr_build()
58 list_for_each_entry(lsfw, &acr->lsfw, head) { in tu102_acr_wpr_build()
70 nvkm_wobj(acr->wpr, offset, &hdr, sizeof(hdr)); in tu102_acr_wpr_build()
74 ret = gp102_acr_wpr_build_lsb(acr, lsfw); in tu102_acr_wpr_build()
79 nvkm_wobj(acr->wpr, lsfw->offset.img, in tu102_acr_wpr_build()
84 lsfw->func->bld_write(acr, lsfw->offset.bld, lsfw); in tu102_acr_wpr_build()
[all …]
H A DKbuild2 nvkm-y += nvkm/subdev/acr/base.o
3 nvkm-y += nvkm/subdev/acr/hsfw.o
4 nvkm-y += nvkm/subdev/acr/lsfw.o
5 nvkm-y += nvkm/subdev/acr/gm200.o
6 nvkm-y += nvkm/subdev/acr/gm20b.o
7 nvkm-y += nvkm/subdev/acr/gp102.o
8 nvkm-y += nvkm/subdev/acr/gp108.o
9 nvkm-y += nvkm/subdev/acr/gp10b.o
10 nvkm-y += nvkm/subdev/acr/tu102.o
H A Dnouveau_nvkm_subdev_acr_lsfw.c45 nvkm_acr_lsfw_del_all(struct nvkm_acr *acr) in nvkm_acr_lsfw_del_all() argument
48 list_for_each_entry_safe(lsfw, lsft, &acr->lsfw, head) { in nvkm_acr_lsfw_del_all()
54 nvkm_acr_lsfw_get(struct nvkm_acr *acr, enum nvkm_acr_lsf_id id) in nvkm_acr_lsfw_get() argument
57 list_for_each_entry(lsfw, &acr->lsfw, head) { in nvkm_acr_lsfw_get()
65 nvkm_acr_lsfw_add(const struct nvkm_acr_lsf_func *func, struct nvkm_acr *acr, in nvkm_acr_lsfw_add() argument
70 if (!acr) in nvkm_acr_lsfw_add()
73 lsfw = nvkm_acr_lsfw_get(acr, id); in nvkm_acr_lsfw_add()
75 nvkm_error(&acr->subdev, "LSFW %d redefined\n", id); in nvkm_acr_lsfw_add()
84 list_add_tail(&lsfw->head, &acr->lsfw); in nvkm_acr_lsfw_add()
100 struct nvkm_acr *acr = subdev->device->acr; in nvkm_acr_lsfw_load_sig_image_desc_() local
[all …]
H A Dnouveau_nvkm_subdev_acr_hsfw.c46 nvkm_acr_hsfw_del_all(struct nvkm_acr *acr) in nvkm_acr_hsfw_del_all() argument
49 list_for_each_entry_safe(hsfw, hsft, &acr->hsfw, head) { in nvkm_acr_hsfw_del_all()
55 nvkm_acr_hsfw_load_image(struct nvkm_acr *acr, const char *name, int ver, in nvkm_acr_hsfw_load_image() argument
58 struct nvkm_subdev *subdev = &acr->subdev; in nvkm_acr_hsfw_load_image()
134 nvkm_acr_hsfw_load_bl(struct nvkm_acr *acr, const char *name, int ver, in nvkm_acr_hsfw_load_bl() argument
137 struct nvkm_subdev *subdev = &acr->subdev; in nvkm_acr_hsfw_load_bl()
162 nvkm_acr_hsfw_load(struct nvkm_acr *acr, const char *bl, const char *fw, in nvkm_acr_hsfw_load() argument
174 list_add_tail(&hsfw->head, &acr->hsfw); in nvkm_acr_hsfw_load()
176 ret = nvkm_acr_hsfw_load_bl(acr, bl, version, hsfw); in nvkm_acr_hsfw_load()
180 ret = nvkm_acr_hsfw_load_image(acr, fw, version, hsfw); in nvkm_acr_hsfw_load()
/netbsd-src/external/nvidia-firmware/nouveau/gp102/acr/
H A DMakefile5 FILES+= ${.CURDIR}/../../dist/gp102/acr/bl.bin
6 FILES+= ${.CURDIR}/../../dist/gp102/acr/ucode_load.bin
7 FILES+= ${.CURDIR}/../../dist/gp102/acr/ucode_unload.bin
8 FILES+= ${.CURDIR}/../../dist/gp102/acr/unload_bl.bin
10 FILESDIR+= ${FIRMWAREDIR}/nouveau/nvidia/gp102/acr
12 SYMLINKS+= ${FIRMWAREDIR}/nouveau/nvidia/gp102/acr/bl.bin \
13 ${FIRMWAREDIR}/nouveau/nvidia/gp104/acr/bl.bin
14 SYMLINKS+= ${FIRMWAREDIR}/nouveau/nvidia/gp102/acr/ucode_load.bin \
15 ${FIRMWAREDIR}/nouveau/nvidia/gp104/acr/ucode_load.bin
16 SYMLINKS+= ${FIRMWAREDIR}/nouveau/nvidia/gp102/acr/ucode_unload.bin \
[all …]
/netbsd-src/external/nvidia-firmware/nouveau/tu102/acr/
H A DMakefile5 FILES+= ${.CURDIR}/../../dist/tu102/acr/bl.bin
6 FILES+= ${.CURDIR}/../../dist/tu102/acr/ucode_ahesasc.bin
7 FILES+= ${.CURDIR}/../../dist/tu102/acr/ucode_asb.bin
8 FILES+= ${.CURDIR}/../../dist/tu102/acr/ucode_unload.bin
9 FILES+= ${.CURDIR}/../../dist/tu102/acr/unload_bl.bin
11 FILESDIR+= ${FIRMWAREDIR}/nouveau/nvidia/tu102/acr
13 SYMLINKS+= ${FIRMWAREDIR}/nouveau/nvidia/tu102/acr/bl.bin \
14 ${FIRMWAREDIR}/nouveau/nvidia/tu104/acr/bl.bin
15 SYMLINKS+= ${FIRMWAREDIR}/nouveau/nvidia/tu102/acr/ucode_ahesasc.bin \
16 ${FIRMWAREDIR}/nouveau/nvidia/tu104/acr/ucode_ahesasc.bin
[all …]
/netbsd-src/external/gpl3/gdb/dist/sim/testsuite/cris/asm/
H A Daddoc.ms14 addo.d 32769,r5,acr
15 move.d [acr],r3
19 addo.w -1,r5,acr
20 move.d [acr],r3
23 addo.d 5,acr,acr
24 move.d [acr],r3
27 addo.b 3,r5,acr
28 movu.w [acr],r3
31 addo.b -4,acr,acr
32 move.d [acr],r3
[all …]
H A Daddiv32.ms16 addi r6.b,r5,acr
18 move.d [acr],r3
24 addi r8.w,r5,acr
26 move.d [acr],r3
31 addi r10.b,acr,acr
33 move.d [acr],r3
40 addi r9.d,r8,acr
42 movu.w [acr],r3
46 addi r11.w,acr,acr
47 move.d [acr],r3
[all …]
H A Daddom.ms22 addo.d [r13+],r5,acr
23 move.d [acr],r3
27 addo.w [r13+],r5,acr
28 move.d [acr],r3
31 addo.d [r13],acr,acr
33 move.d [acr],r3
36 addo.b [r13+],r5,acr
37 movu.w [acr],r3
40 addo.b [r13],acr,acr
42 move.d [acr],r3
[all …]
H A Daddoq.ms14 addoq 0,r5,acr
16 move.d [acr],r3
19 addoq 4,r5,acr
21 move.d [acr],r3
24 addoq -8,acr,acr
26 move.d [acr],r3
28 addoq 3,r5,acr
29 movu.w [acr],r3
H A Dx7-v32.ms14 move.d 0xaa424243,$acr
15 lsrq 1,$acr
16 moveq 1,$acr
17 clear.d $acr
H A Dtmvm2.ms234 t_S_x_y none addi r3.b "r8,acr" ; 3
235 t_S_x_y none addi r8.w "r3,acr" ; 3
236 t_S_x_y none addi r4.d "r3,acr" ; 3
237 t_S_x_y none addi r8.w "r9,acr"
239 t_S_x_y .b addo 42 "r8,acr"
240 t_S_x_y .w addo 4200 "r3,acr" ; 3
241 t_S_x_y .d addo 420000 "r3,acr" ; 3
244 t_S_x_y .d,addo,[r4],"r3,acr" ; 3 (1 mem src)
245 t_S_x_y .b,addo,[r3],"r8,acr" ; 3 (1 mem src)
246 t_S_x_y .w,addo,[r8],"r3,acr" ; 3
[all …]
/netbsd-src/external/nvidia-firmware/nouveau/tu116/acr/
H A DMakefile5 FILES+= ${.CURDIR}/../../dist/tu116/acr/bl.bin
6 FILES+= ${.CURDIR}/../../dist/tu116/acr/ucode_ahesasc.bin
7 FILES+= ${.CURDIR}/../../dist/tu116/acr/ucode_asb.bin
8 FILES+= ${.CURDIR}/../../dist/tu116/acr/ucode_unload.bin
9 FILES+= ${.CURDIR}/../../dist/tu116/acr/unload_bl.bin
11 FILESDIR+= ${FIRMWAREDIR}/nouveau/nvidia/tu116/acr
13 SYMLINKS+= ${FIRMWAREDIR}/nouveau/nvidia/tu116/acr/bl.bin \
14 ${FIRMWAREDIR}/nouveau/nvidia/tu117/acr/bl.bin
15 SYMLINKS+= ${FIRMWAREDIR}/nouveau/nvidia/tu116/acr/ucode_ahesasc.bin \
16 ${FIRMWAREDIR}/nouveau/nvidia/tu117/acr/ucode_ahesasc.bin
[all …]
/netbsd-src/external/nvidia-firmware/nouveau/gm200/acr/
H A DMakefile7 FILES+= ${.CURDIR}/../../dist/gm200/acr/bl.bin
8 FILES+= ${.CURDIR}/../../dist/gm200/acr/ucode_load.bin
9 FILES+= ${.CURDIR}/../../dist/gm200/acr/ucode_unload.bin
11 FILESDIR+= ${FIRMWAREDIR}/nouveau/nvidia/gm200/acr
13 SYMLINKS+= ${FIRMWAREDIR}/nouveau/nvidia/gm200/acr/bl.bin \
14 ${FIRMWAREDIR}/nouveau/nvidia/gm204/acr/bl.bin
15 SYMLINKS+= ${FIRMWAREDIR}/nouveau/nvidia/gm200/acr/ucode_load.bin \
16 ${FIRMWAREDIR}/nouveau/nvidia/gm204/acr/ucode_load.bin
17 SYMLINKS+= ${FIRMWAREDIR}/nouveau/nvidia/gm200/acr/ucode_unload.bin \
18 ${FIRMWAREDIR}/nouveau/nvidia/gm204/acr/ucode_unload.bin
[all …]
/netbsd-src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/sec2/
H A Dnouveau_nvkm_engine_sec2_gp102.c85 gp102_sec2_acr_bld_patch(struct nvkm_acr *acr, u32 bld, s64 adjust) in gp102_sec2_acr_bld_patch() argument
88 nvkm_robj(acr->wpr, bld, &hdr, sizeof(hdr)); in gp102_sec2_acr_bld_patch()
92 nvkm_wobj(acr->wpr, bld, &hdr, sizeof(hdr)); in gp102_sec2_acr_bld_patch()
93 loader_config_v1_dump(&acr->subdev, &hdr); in gp102_sec2_acr_bld_patch()
97 gp102_sec2_acr_bld_write(struct nvkm_acr *acr, u32 bld, in gp102_sec2_acr_bld_write() argument
114 nvkm_wobj(acr->wpr, bld, &hdr, sizeof(hdr)); in gp102_sec2_acr_bld_write()
266 gp102_sec2_acr_bld_patch_1(struct nvkm_acr *acr, u32 bld, s64 adjust) in gp102_sec2_acr_bld_patch_1() argument
269 nvkm_robj(acr->wpr, bld, &hdr, sizeof(hdr)); in gp102_sec2_acr_bld_patch_1()
272 nvkm_wobj(acr->wpr, bld, &hdr, sizeof(hdr)); in gp102_sec2_acr_bld_patch_1()
273 flcn_bl_dmem_desc_v2_dump(&acr->subdev, &hdr); in gp102_sec2_acr_bld_patch_1()
[all …]
/netbsd-src/external/nvidia-firmware/nouveau/gv100/acr/
H A DMakefile5 FILES+= ${.CURDIR}/../../dist/gv100/acr/bl.bin
6 FILES+= ${.CURDIR}/../../dist/gv100/acr/ucode_load.bin
7 FILES+= ${.CURDIR}/../../dist/gv100/acr/ucode_unload.bin
8 FILES+= ${.CURDIR}/../../dist/gv100/acr/unload_bl.bin
10 FILESDIR+= ${FIRMWAREDIR}/nouveau/nvidia/gv100/acr
/netbsd-src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/gr/
H A Dnouveau_nvkm_engine_gr_gp108.c34 gp108_gr_acr_bld_patch(struct nvkm_acr *acr, u32 bld, s64 adjust) in gp108_gr_acr_bld_patch() argument
37 nvkm_robj(acr->wpr, bld, &hdr, sizeof(hdr)); in gp108_gr_acr_bld_patch()
40 nvkm_wobj(acr->wpr, bld, &hdr, sizeof(hdr)); in gp108_gr_acr_bld_patch()
41 flcn_bl_dmem_desc_v2_dump(&acr->subdev, &hdr); in gp108_gr_acr_bld_patch()
45 gp108_gr_acr_bld_write(struct nvkm_acr *acr, u32 bld, in gp108_gr_acr_bld_write() argument
61 nvkm_wobj(acr->wpr, bld, &hdr, sizeof(hdr)); in gp108_gr_acr_bld_write()
H A Dnouveau_nvkm_engine_gr_gm20b.c39 gm20b_gr_acr_bld_patch(struct nvkm_acr *acr, u32 bld, s64 adjust) in gm20b_gr_acr_bld_patch() argument
44 nvkm_robj(acr->wpr, bld, &hdr, sizeof(hdr)); in gm20b_gr_acr_bld_patch()
51 nvkm_wobj(acr->wpr, bld, &hdr, sizeof(hdr)); in gm20b_gr_acr_bld_patch()
53 flcn_bl_dmem_desc_dump(&acr->subdev, &hdr); in gm20b_gr_acr_bld_patch()
57 gm20b_gr_acr_bld_write(struct nvkm_acr *acr, u32 bld, in gm20b_gr_acr_bld_write() argument
75 nvkm_wobj(acr->wpr, bld, &hdr, sizeof(hdr)); in gm20b_gr_acr_bld_write()
92 if (!device->acr) { in gm20b_gr_init_gpc_mmu()
/netbsd-src/external/nvidia-firmware/nouveau/gp100/acr/
H A DMakefile5 FILES+= ${.CURDIR}/../../dist/gp100/acr/bl.bin
6 FILES+= ${.CURDIR}/../../dist/gp100/acr/ucode_load.bin
7 FILES+= ${.CURDIR}/../../dist/gp100/acr/ucode_unload.bin
9 FILESDIR+= ${FIRMWAREDIR}/nouveau/nvidia/gp100/acr
/netbsd-src/sys/external/bsd/drm2/dist/drm/radeon/
H A Dradeon_dce3_1_afmt.c176 const struct radeon_hdmi_acr *acr) in dce3_2_hdmi_update_acr() argument
186 HDMI0_ACR_CTS_32(acr->cts_32khz), in dce3_2_hdmi_update_acr()
189 HDMI0_ACR_N_32(acr->n_32khz), in dce3_2_hdmi_update_acr()
193 HDMI0_ACR_CTS_44(acr->cts_44_1khz), in dce3_2_hdmi_update_acr()
196 HDMI0_ACR_N_44(acr->n_44_1khz), in dce3_2_hdmi_update_acr()
200 HDMI0_ACR_CTS_48(acr->cts_48khz), in dce3_2_hdmi_update_acr()
203 HDMI0_ACR_N_48(acr->n_48khz), in dce3_2_hdmi_update_acr()
/netbsd-src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/pmu/
H A Dnouveau_nvkm_subdev_pmu_gm20b.c81 gm20b_pmu_acr_bld_patch(struct nvkm_acr *acr, u32 bld, s64 adjust) in gm20b_pmu_acr_bld_patch() argument
86 nvkm_robj(acr->wpr, bld, &hdr, sizeof(hdr)); in gm20b_pmu_acr_bld_patch()
96 nvkm_wobj(acr->wpr, bld, &hdr, sizeof(hdr)); in gm20b_pmu_acr_bld_patch()
98 loader_config_dump(&acr->subdev, &hdr); in gm20b_pmu_acr_bld_patch()
102 gm20b_pmu_acr_bld_write(struct nvkm_acr *acr, u32 bld, in gm20b_pmu_acr_bld_write() argument
124 nvkm_wobj(acr->wpr, bld, &hdr, sizeof(hdr)); in gm20b_pmu_acr_bld_write()
234 ver, fwif->acr); in gm20b_pmu_load()

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