Searched refs:XUSB_PADCTL_UPHY_USB3_PADn_ECTL_1_REG (Results 1 – 1 of 1) sorted by relevance
175 #define XUSB_PADCTL_UPHY_USB3_PADn_ECTL_1_REG(n) (0xa60 + (n) * 0x40) macro872 SETCLR4(sc, XUSB_PADCTL_UPHY_USB3_PADn_ECTL_1_REG(port->index), in tegra210_xusbpad_configure_usb3_port()