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Searched refs:WriteRef (Results 1 – 4 of 4) sorted by relevance

/netbsd-src/external/apache2/llvm/dist/llvm/lib/MCA/HardwareUnits/
H A DRegisterFile.cpp25 const unsigned WriteRef::INVALID_IID = std::numeric_limits<unsigned>::max();
27 WriteRef::WriteRef(unsigned SourceIndex, WriteState *WS) in WriteRef() function in llvm::mca::WriteRef
31 void WriteRef::commit() { in commit()
36 void WriteRef::notifyExecuted(unsigned Cycle) { in notifyExecuted()
41 bool WriteRef::hasKnownWriteBackCycle() const { in hasKnownWriteBackCycle()
45 bool WriteRef::isWriteZero() const { in isWriteZero()
50 unsigned WriteRef::getWriteResourceID() const { in getWriteResourceID()
56 MCPhysReg WriteRef::getRegisterID() const { in getRegisterID()
65 RegisterMappings(mri.getNumRegs(), {WriteRef(), RegisterRenamingInfo()}), in RegisterFile()
119 WriteRef &WR = RegisterMappings[RegID].first; in onInstructionExecuted()
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/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/MCA/HardwareUnits/
H A DRegisterFile.h38 class WriteRef {
48 WriteRef() in WriteRef() function
51 WriteRef(unsigned SourceIndex, WriteState *WS);
72 bool operator==(const WriteRef &Other) const {
187 using RegisterMapping = std::pair<WriteRef, RegisterRenamingInfo>;
237 SmallVectorImpl<WriteRef> &Writes,
238 SmallVectorImpl<WriteRef> &CommittedWrites) const;
244 void addRegisterWrite(WriteRef Write, MutableArrayRef<unsigned> UsedPhysRegs);
284 unsigned getElapsedCyclesFromWriteBack(const WriteRef &WR) const;
/netbsd-src/external/apache2/llvm/dist/llvm/lib/MCA/Stages/
H A DInOrderIssueStage.cpp97 SmallVector<WriteRef, 4> Writes; in checkRegisterHazard()
98 SmallVector<WriteRef, 4> CommittedWrites; in checkRegisterHazard()
105 for (const WriteRef &WR : Writes) { in checkRegisterHazard()
127 for (const WriteRef &WR : CommittedWrites) { in checkRegisterHazard()
186 PRF.addRegisterWrite(WriteRef(SourceIndex, &WS), UsedRegs); in addRegisterReadWrite()
H A DDispatchStage.cpp121 PRF.addRegisterWrite(WriteRef(IR.getSourceIndex(), &WS), RegisterFiles); in dispatch()