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Searched refs:VTList (Results 1 – 15 of 15) sorted by relevance

/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DSelectionDAG.h972 SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList,
978 SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList,
1001 SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList);
1002 SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N);
1003 SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1,
1005 SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1,
1007 SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1,
1009 SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1,
1123 SDVTList VTList, ArrayRef<SDValue> Ops,
1131 unsigned Opcode, const SDLoc &dl, SDVTList VTList, ArrayRef<SDValue> Ops,
[all …]
H A DTargetRegisterInfo.h237 vt_iterator VTList; member
314 return getRegClassInfo(RC).VTList; in legalclasstypes_begin()
H A DSelectionDAGISel.h324 SDNode *MorphNode(SDNode *Node, unsigned TargetOpc, SDVTList VTList,
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeIntegerTypes.cpp2567 SDVTList VTList = DAG.getVTList(NVT, getSetCCResultType(NVT)); in ExpandIntRes_ADDSUB() local
2569 Lo = DAG.getNode(ISD::UADDO, dl, VTList, LoOps); in ExpandIntRes_ADDSUB()
2571 Hi = DAG.getNode(ISD::ADDCARRY, dl, VTList, HiOps); in ExpandIntRes_ADDSUB()
2573 Lo = DAG.getNode(ISD::USUBO, dl, VTList, LoOps); in ExpandIntRes_ADDSUB()
2575 Hi = DAG.getNode(ISD::SUBCARRY, dl, VTList, HiOps); in ExpandIntRes_ADDSUB()
2591 SDVTList VTList = DAG.getVTList(NVT, MVT::Glue); in ExpandIntRes_ADDSUB() local
2593 Lo = DAG.getNode(ISD::ADDC, dl, VTList, LoOps); in ExpandIntRes_ADDSUB()
2595 Hi = DAG.getNode(ISD::ADDE, dl, VTList, HiOps); in ExpandIntRes_ADDSUB()
2597 Lo = DAG.getNode(ISD::SUBC, dl, VTList, LoOps); in ExpandIntRes_ADDSUB()
2599 Hi = DAG.getNode(ISD::SUBE, dl, VTList, HiOps); in ExpandIntRes_ADDSUB()
[all …]
H A DSelectionDAG.cpp561 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { in AddNodeIDValueTypes() argument
562 ID.AddPointer(VTList.VTs); in AddNodeIDValueTypes()
584 SDVTList VTList, ArrayRef<SDValue> OpList) { in AddNodeIDNode() argument
586 AddNodeIDValueTypes(ID, VTList); in AddNodeIDNode()
7035 SDVTList VTList, ArrayRef<SDValue> Ops, in getAtomic() argument
7039 AddNodeIDNode(ID, Opcode, VTList, Ops); in getAtomic()
7048 VTList, MemVT, MMO); in getAtomic()
7119 unsigned Opcode, const SDLoc &dl, SDVTList VTList, ArrayRef<SDValue> Ops, in getMemIntrinsicNode() argument
7131 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, MemVT, MMO); in getMemIntrinsicNode()
7135 SDVTList VTList, in getMemIntrinsicNode() argument
[all …]
H A DSelectionDAGISel.cpp2466 MorphNode(SDNode *Node, unsigned TargetOpc, SDVTList VTList, in MorphNode() argument
2487 SDNode *Res = CurDAG->MorphNodeTo(Node, ~TargetOpc, VTList, Ops); in MorphNode()
3484 SDVTList VTList; in SelectCodeCommon() local
3486 VTList = CurDAG->getVTList(VTs[0]); in SelectCodeCommon()
3488 VTList = CurDAG->getVTList(VTs[0], VTs[1]); in SelectCodeCommon()
3490 VTList = CurDAG->getVTList(VTs); in SelectCodeCommon()
3546 VTList, Ops); in SelectCodeCommon()
3565 Res = cast<MachineSDNode>(MorphNode(NodeToMatch, TargetOpc, VTList, in SelectCodeCommon()
H A DScheduleDAGSDNodes.cpp146 SDVTList VTList = DAG->getVTList(VTs); in CloneNodeWithValues() local
154 DAG->MorphNodeTo(N, N->getOpcode(), VTList, Ops); in CloneNodeWithValues()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelDAGToDAG.cpp423 SDVTList VTList = CurDAG->getVTList(VT, MVT::Other); in matchLoadD16FromBuildVector() local
439 CurDAG->getMemIntrinsicNode(LoadOp, SDLoc(LdHi), VTList, in matchLoadD16FromBuildVector()
457 SDVTList VTList = CurDAG->getVTList(VT, MVT::Other); in matchLoadD16FromBuildVector() local
473 CurDAG->getMemIntrinsicNode(LoadOp, SDLoc(LdLo), VTList, in matchLoadD16FromBuildVector()
1035 SDVTList VTList = CurDAG->getVTList(MVT::i32, MVT::Glue); in SelectADD_SUB_I64() local
1049 AddLo = CurDAG->getMachineNode(Opc, DL, VTList, Args); in SelectADD_SUB_I64()
1052 AddLo = CurDAG->getMachineNode(CarryOpc, DL, VTList, Args); in SelectADD_SUB_I64()
1059 SDNode *AddHi = CurDAG->getMachineNode(CarryOpc, DL, VTList, AddHiArgs); in SelectADD_SUB_I64()
H A DSIISelLowering.cpp4628 SDVTList VTList = DAG.getVTList(EquivLoadVT, MVT::Other); in adjustLoadValueType() local
4633 VTList, Ops, M->getMemoryVT(), in adjustLoadValueType()
4668 SDVTList VTList = DAG.getVTList(CastVT, MVT::Other); in lowerIntrinsicLoad() local
4669 SDValue MemNode = getMemIntrinsicNode(Opc, DL, VTList, Ops, CastVT, in lowerIntrinsicLoad()
6359 SDVTList VTList = DAG.getVTList({LoadVT, MVT::Glue}); in lowerSBuffer() local
6379 Loads.push_back(getMemIntrinsicNode(AMDGPUISD::BUFFER_LOAD, DL, VTList, Ops, in lowerSBuffer()
7428 SDVTList VTList, in getMemIntrinsicNode() argument
7432 EVT VT = VTList.VTs[0]; in getMemIntrinsicNode()
7444 assert(VTList.NumVTs == 2); in getMemIntrinsicNode()
7445 SDVTList WidenedVTList = DAG.getVTList(WidenedVT, VTList.VTs[1]); in getMemIntrinsicNode()
[all …]
H A DSIISelLowering.h115 SDValue getMemIntrinsicNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList,
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
H A DMipsISelLowering.cpp2631 SDVTList VTList = DAG.getVTList(VT, VT); in lowerShiftRightParts() local
2634 DL, VTList, Cond, ShiftRightHi, in lowerShiftRightParts()
2653 SDVTList VTList = DAG.getVTList(VT, MVT::Other); in createLoadLR() local
2660 return DAG.getMemIntrinsicNode(Opc, DL, VTList, Ops, MemVT, in createLoadLR()
2734 SDVTList VTList = DAG.getVTList(MVT::Other); in createStoreLR() local
2741 return DAG.getMemIntrinsicNode(Opc, DL, VTList, Ops, MemVT, in createStoreLR()
/netbsd-src/external/apache2/llvm/dist/llvm/utils/TableGen/
H A DCodeGenDAGPatterns.h200 TypeSetByHwMode(ArrayRef<ValueTypeByHwMode> VTList);
H A DCodeGenDAGPatterns.cpp69 TypeSetByHwMode::TypeSetByHwMode(ArrayRef<ValueTypeByHwMode> VTList) { in TypeSetByHwMode() argument
70 for (const ValueTypeByHwMode &VVT : VTList) { in TypeSetByHwMode()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp3949 SDVTList VTList = DAG.getVTList(WideVT, MVT::Other); in lowerATOMIC_LOAD_OP() local
3952 SDValue AtomicOp = DAG.getMemIntrinsicNode(Opcode, DL, VTList, Ops, in lowerATOMIC_LOAD_OP()
4052 SDVTList VTList = DAG.getVTList(WideVT, MVT::i32, MVT::Other); in lowerATOMIC_CMP_SWAP() local
4056 VTList, Ops, NarrowVT, MMO); in lowerATOMIC_CMP_SWAP()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp5428 SDVTList VTList = DAG.getVTList(MVT::Other, MVT::Glue); in OptimizeVFPBrcond() local
5430 return DAG.getNode(ARMISD::BCC_i64, dl, VTList, Ops); in OptimizeVFPBrcond()
5545 SDVTList VTList = DAG.getVTList(MVT::Other, MVT::Glue); in LowerBR_CC() local
5547 SDValue Res = DAG.getNode(ARMISD::BRCOND, dl, VTList, Ops); in LowerBR_CC()
5551 Res = DAG.getNode(ARMISD::BRCOND, dl, VTList, Ops); in LowerBR_CC()
18964 SDVTList VTList = DAG.getVTList(HalfT, MVT::i1); in lowerABS() local
18974 Lo = DAG.getNode(ISD::UADDO, dl, VTList, Tmp, Lo); in lowerABS()
18975 Hi = DAG.getNode(ISD::ADDCARRY, dl, VTList, Tmp, Hi, in lowerABS()