Home
last modified time | relevance | path

Searched refs:VQ (Results 1 – 25 of 36) sorted by relevance

12

/netbsd-src/external/gpl3/gcc.old/dist/gcc/config/aarch64/
H A Daarch64-ldpstp.md95 [(set (match_operand:VQ 0 "register_operand" "")
96 (match_operand:VQ 1 "memory_operand" ""))
100 && aarch64_operands_ok_for_ldpstp (operands, true, <VQ:MODE>mode)
110 [(set (match_operand:VQ 0 "memory_operand" "")
111 (match_operand:VQ 1 "register_operand" ""))
115 && aarch64_operands_ok_for_ldpstp (operands, false, <VQ:MODE>mode)
H A Daarch64-simd-builtins.def75 /* Implemented by aarch64_get_qreg<VSTRUCT:mode><VQ:mode>. */
82 /* Implemented by aarch64_set_qreg<VSTRUCT:mode><VQ:mode>. */
89 /* Implemented by aarch64_ld1x2<VQ:mode>. */
97 /* Implemented by aarch64_ld<VSTRUCT:nregs><VQ:mode>. */
105 /* Implemented by aarch64_ld<VSTRUCT:nregs>_lane<VQ:mode>. */
113 /* Implemented by aarch64_st<VSTRUCT:nregs><VQ:mode>. */
H A Daarch64-simd.md219 (define_insn "load_pair<VQ:mode><VQ2:mode>"
220 [(set (match_operand:VQ 0 "register_operand" "=w")
221 (match_operand:VQ 1 "aarch64_mem_pair_operand" "Ump"))
228 GET_MODE_SIZE (<VQ:MODE>mode)))"
233 (define_insn "vec_store_pair<VQ:mode><VQ2:mode>"
234 [(set (match_operand:VQ 0 "aarch64_mem_pair_operand" "=Ump")
235 (match_operand:VQ 1 "register_operand" "w"))
241 GET_MODE_SIZE (<VQ:MODE>mode)))"
4998 (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
5033 (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
[all …]
H A Daarch64-modes.def169 SVE vector (referred to as "VQ") minus one. */
H A Diterators.md108 (define_mode_iterator VQ [V16QI V8HI V4SI V2DI V8HF V4SF V2DF V8BF])
122 ;; VQ without 2 element modes.
/netbsd-src/external/gpl3/gcc/dist/gcc/config/aarch64/
H A Daarch64-ldpstp.md95 [(set (match_operand:VQ 0 "register_operand" "")
96 (match_operand:VQ 1 "memory_operand" ""))
100 && aarch64_operands_ok_for_ldpstp (operands, true, <VQ:MODE>mode)
110 [(set (match_operand:VQ 0 "memory_operand" "")
111 (match_operand:VQ 1 "register_operand" ""))
115 && aarch64_operands_ok_for_ldpstp (operands, false, <VQ:MODE>mode)
H A Daarch64-modes.def234 SVE vector (referred to as "VQ") minus one. */
H A Daarch64-simd.md221 (define_insn "load_pair<VQ:mode><VQ2:mode>"
222 [(set (match_operand:VQ 0 "register_operand" "=w")
223 (match_operand:VQ 1 "aarch64_mem_pair_operand" "Ump"))
230 GET_MODE_SIZE (<VQ:MODE>mode)))"
235 (define_insn "vec_store_pair<VQ:mode><VQ2:mode>"
236 [(set (match_operand:VQ 0 "aarch64_mem_pair_operand" "=Ump")
237 (match_operand:VQ 1 "register_operand" "w"))
243 GET_MODE_SIZE (<VQ:MODE>mode)))"
H A Diterators.md111 (define_mode_iterator VQ [V16QI V8HI V4SI V2DI V8HF V4SF V2DF V8BF])
128 ;; VQ without 2 element modes.
/netbsd-src/share/misc/
H A Dcountry262 Virgin Islands, U.S. VI VIR 850 VQ
/netbsd-src/external/gpl3/gcc/dist/gcc/config/arm/
H A Dvec-common.md545 (match_operand:VQ 1 "s_register_operand")]
H A Diterators.md110 (define_mode_iterator VQ [V16QI V8HI V4SI V4SF])
H A Dneon.md1193 (match_operand:VQ 1 "s_register_operand")]
1219 (match_operand:VQ 1 "s_register_operand")]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonISelLoweringHVX.cpp1605 SDValue VQ = compressHvxPred(ValQ, dl, WordTy, DAG); in LowerHvxBitcast() local
1609 SDValue W0 = extractHvxElementReg(VQ, DAG.getConstant(0, dl, MVT::i32), in LowerHvxBitcast()
1622 VQ, DAG.getConstant(i, dl, MVT::i32), dl, MVT::i32, DAG); in LowerHvxBitcast()
H A DHexagonRegisterInfo.td365 (add (sequence "VQ%u", 0, 7))> {
/netbsd-src/external/bsd/file/dist/magic/magdir/
H A Dimages3076 >0x09 ubyte 0x03 \b, VQ
3077 >0x09 ubyte 0x04 \b, VQ & mipmap
3085 >0x09 ubyte 0x10 \b, small VQ
3086 >0x09 ubyte 0x11 \b, small VQ & mipmap
/netbsd-src/external/gpl3/gdb.old/dist/opcodes/
H A DChangeLog-20191034 * arm-dis.c: Only accept signed variants of VQ(R)DMLAH and VQ(R)DMLASH
/netbsd-src/external/gpl3/binutils/dist/opcodes/
H A DChangeLog-20191034 * arm-dis.c: Only accept signed variants of VQ(R)DMLAH and VQ(R)DMLASH
/netbsd-src/external/gpl3/binutils.old/dist/opcodes/
H A DChangeLog-20191034 * arm-dis.c: Only accept signed variants of VQ(R)DMLAH and VQ(R)DMLASH
/netbsd-src/external/gpl3/gdb/dist/opcodes/
H A DChangeLog-20191034 * arm-dis.c: Only accept signed variants of VQ(R)DMLAH and VQ(R)DMLASH
/netbsd-src/external/gpl3/gcc.old/dist/gcc/config/arm/
H A Dneon.md1320 (match_operand:VQ 1 "s_register_operand")]
1370 (match_operand:VQ 1 "s_register_operand")]
1397 (match_operand:VQ 1 "s_register_operand")]
H A Diterators.md118 (define_mode_iterator VQ [V16QI V8HI V4SI V4SF])
/netbsd-src/external/gpl3/gdb/dist/gdb/
H A DChangeLog-20189040 * aarch64-tdep.c (aarch64_get_tdesc_vq): Use uint64_t for VQ.
9052 * aarch64-tdep.c (aarch64_read_description): Use uint64_t for VQ.
9259 (aarch64_read_description): Use VQ to index tdesc_aarch64_list.
9261 * aarch64-tdep.h (aarch64_read_description): Add VQ parmeter.
9262 * arch/aarch64.c (aarch64_create_target_description): Check VQ.
9263 * arch/aarch64.h (aarch64_create_target_description): Add VQ.
/netbsd-src/external/gpl3/gdb.old/dist/gdb/
H A DChangeLog-20189040 * aarch64-tdep.c (aarch64_get_tdesc_vq): Use uint64_t for VQ.
9052 * aarch64-tdep.c (aarch64_read_description): Use uint64_t for VQ.
9259 (aarch64_read_description): Use VQ to index tdesc_aarch64_list.
9261 * aarch64-tdep.h (aarch64_read_description): Add VQ parmeter.
9262 * arch/aarch64.c (aarch64_create_target_description): Check VQ.
9263 * arch/aarch64.h (aarch64_create_target_description): Add VQ.
/netbsd-src/external/gpl3/gdb/dist/gdbserver/
H A DChangeLog-2002-20216161 * linux-aarch64-ipa.c (get_ipa_tdesc): Add null VQ param.
6163 * linux-aarch64-low.c (aarch64_arch_setup): Get VQ.
6164 * linux-aarch64-tdesc-selftest.c (aarch64_tdesc_test): Add null VQ
6166 * linux-aarch64-tdesc.c (aarch64_linux_read_description): Add VQ
6168 * linux-aarch64-tdesc.h (aarch64_linux_read_description): Add VQ.
6246 null VQ.

12