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Searched refs:VIASR (Results 1 – 3 of 3) sorted by relevance

/netbsd-src/sys/dev/pci/
H A Dunichromemode.h98 {VIASR, SR10, 0xFF, 0x01},
99 {VIASR, SR15, 0x02, 0x02},
100 {VIASR, SR16, 0xBF, 0x08},
101 {VIASR, SR17, 0xFF, 0x1F},
102 {VIASR, SR18, 0xFF, 0x4E},
103 {VIASR, SR1A, 0xFB, 0x08},
104 {VIASR, SR1E, 0x0F, 0x01},
105 {VIASR, SR2A, 0xF0, 0x00},
156 {VIASR,SR10,0xFF,0x01},
157 {VIASR,SR15,0x02,0x02},
[all …]
H A Dunichromefb.c288 val = uni_rd(sc, VIASR, SR30); in unichromefb_attach()
290 val = uni_rd(sc, VIASR, SR39); in unichromefb_attach()
651 bus_space_write_1(sc->sc_iot, sc->sc_ioh, VIASR, i); in uni_setmode()
652 bus_space_write_1(sc->sc_iot, sc->sc_ioh, VIASR + 1, in uni_setmode()
678 uni_wr_mask(sc, VIASR, SR16, 0x00, BIT6); in uni_setmode()
714 uni_wr_mask(sc, VIASR, SR01, 0, BIT5); in uni_screen_enable()
720 uni_wr_mask(sc, VIASR, SR01, 0x20, BIT5); in uni_screen_disable()
947 uni_wr_mask(sc, VIASR, cridx, data, regmask); in uni_load_reg()
1000 VIASR); in uni_load_fetchcnt()
1041 uni_load_reg(sc, val, regnum, reg, VIASR); in uni_load_fifo()
[all …]
H A Dunichromereg.h97 #define VIASR 0x004 macro