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Searched refs:UMC_BASE (Results 1 – 9 of 9) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_arct_reg_init.c59 adev->reg_offset[UMC_HWIP][i] = (uint32_t *)(&(UMC_BASE.instance[i])); in arct_reg_base_init()
H A Damdgpu_vega20_reg_init.c57 adev->reg_offset[UMC_HWIP][i] = (uint32_t *)(&(UMC_BASE.instance[i])); in vega20_reg_base_init()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/include/
H A Dnavi10_ip_offset.h129 static const struct IP_BASE UMC_BASE ={ { { { 0x00014000, 0, 0, 0, 0, 0 } }, variable
H A Dnavi12_ip_offset.h174 static const struct IP_BASE UMC_BASE ={ { { { 0x00014000, 0x02425800, 0, 0, 0 } }, variable
H A Dnavi14_ip_offset.h174 static const struct IP_BASE UMC_BASE ={ { { { 0x00014000, 0x02425800, 0, 0, 0 } }, variable
H A Dvega20_ip_offset.h137 static const struct IP_BASE UMC_BASE ={ { { { 0x00014000, 0, 0, 0, 0, 0 } }, variable
H A Dvega10_ip_offset.h185 static const struct IP_BASE UMC_BASE = { { { { 0x00014000, 0, 0, 0, 0 } }, variable
H A Drenoir_ip_offset.h214 static const struct IP_BASE UMC_BASE ={ { { { 0x00014000, 0x02425800, 0, 0, 0 } }, variable
H A Darct_ip_offset.h213 static const struct IP_BASE UMC_BASE ={ { { { 0x000132C0, 0x00014000, 0x00425800, 0, 0, … variable