| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | TargetRegisterInfo.cpp | 52 TargetRegisterInfo::TargetRegisterInfo(const TargetRegisterInfoDesc *ID, in TargetRegisterInfo() function in TargetRegisterInfo
66 TargetRegisterInfo::~TargetRegisterInfo() = default;
68 bool TargetRegisterInfo::shouldRegionSplitForVirtReg( in shouldRegionSplitForVirtReg()
79 void TargetRegisterInfo::markSuperRegs(BitVector &RegisterSet, in markSuperRegs()
85 bool TargetRegisterInfo::checkAllSuperRegsMarked(const BitVector &RegisterSet, in checkAllSuperRegsMarked()
110 Printable printReg(Register Reg, const TargetRegisterInfo *TRI, in printReg()
141 Printable printRegUnit(unsigned Unit, const TargetRegisterInfo *TRI) { in printRegUnit()
164 Printable printVRegOrUnit(unsigned Unit, const TargetRegisterInfo *TRI) { in printVRegOrUnit()
175 const TargetRegisterInfo *TRI) { in printRegClassOrBank()
194 TargetRegisterInfo::getAllocatableClass(const TargetRegisterClass *RC) const { in getAllocatableClass()
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| H A D | InterferenceCache.h | 30 class TargetRegisterInfo; variable
117 void revalidate(LiveIntervalUnion *LIUArray, const TargetRegisterInfo *TRI);
120 bool valid(LiveIntervalUnion *LIUArray, const TargetRegisterInfo *TRI);
124 const TargetRegisterInfo *TRI, const MachineFunction *MF);
139 const TargetRegisterInfo *TRI = nullptr;
169 const TargetRegisterInfo *tri);
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| H A D | RegisterCoalescer.h | 23 class TargetRegisterInfo; variable
29 const TargetRegisterInfo &TRI;
60 CoalescerPair(const TargetRegisterInfo &tri) : TRI(tri) {} in CoalescerPair()
65 const TargetRegisterInfo &tri) in CoalescerPair()
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| H A D | TargetFrameLoweringImpl.cpp | 48 const TargetRegisterInfo *RI = MF.getSubtarget().getRegisterInfo(); in getFrameIndexReference()
67 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in getCalleeSaves()
81 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in determineCalleeSaves()
162 const TargetRegisterInfo *RI = MF.getSubtarget().getRegisterInfo(); in getDwarfFrameBase()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64RegisterBankInfo.h | 23 class TargetRegisterInfo; variable
123 const TargetRegisterInfo &TRI, unsigned Depth = 0) const;
127 const TargetRegisterInfo &TRI, unsigned Depth = 0) const;
131 const TargetRegisterInfo &TRI, unsigned Depth = 0) const;
134 AArch64RegisterBankInfo(const TargetRegisterInfo &TRI);
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | RegisterBank.h | 23 class TargetRegisterInfo; variable
65 bool verify(const TargetRegisterInfo &TRI) const;
81 void dump(const TargetRegisterInfo *TRI = nullptr) const;
89 const TargetRegisterInfo *TRI = nullptr) const;
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | MachineInstr.h | 55 class TargetRegisterInfo; variable
1356 const TargetRegisterInfo *TRI = nullptr) const {
1377 const TargetRegisterInfo *TRI = nullptr) const {
1386 const TargetRegisterInfo *TRI = nullptr) const {
1394 const TargetRegisterInfo *TRI = nullptr) const {
1402 const TargetRegisterInfo *TRI = nullptr) const {
1414 const TargetRegisterInfo *TRI = nullptr) const;
1419 const TargetRegisterInfo *TRI = nullptr) {
1426 const TargetRegisterInfo *TRI = nullptr) const {
1439 const TargetRegisterInfo *TRI = nullptr) const;
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| H A D | LiveRegUnits.h | 31 const TargetRegisterInfo *TRI = nullptr;
39 LiveRegUnits(const TargetRegisterInfo &TRI) { in LiveRegUnits()
50 const TargetRegisterInfo *TRI) { in accumulateUsedDefed()
73 void init(const TargetRegisterInfo &TRI) { in init()
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| H A D | TargetRegisterInfo.h | 231 class TargetRegisterInfo : public MCRegisterInfo {
251 TargetRegisterInfo(const TargetRegisterInfoDesc *ID,
259 virtual ~TargetRegisterInfo();
661 const TargetRegisterInfo *TRI = nullptr);
1123 const TargetRegisterInfo *TRI,
1223 BitMaskClassIterator(const uint32_t *Mask, const TargetRegisterInfo &TRI) in BitMaskClassIterator()
1260 Printable printReg(Register Reg, const TargetRegisterInfo *TRI = nullptr,
1272 Printable printRegUnit(unsigned Unit, const TargetRegisterInfo *TRI);
1276 Printable printVRegOrUnit(unsigned VRegOrUnit, const TargetRegisterInfo *TRI);
1281 const TargetRegisterInfo *TRI);
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| H A D | TargetInstrInfo.h | 60 class TargetRegisterInfo; variable
116 const TargetRegisterInfo *TRI,
387 const TargetRegisterInfo &TRI) const;
1028 const TargetRegisterInfo *TRI) const { in storeRegToStackSlot()
1040 const TargetRegisterInfo *TRI) const { in loadRegFromStackSlot()
1322 const TargetRegisterInfo *TRI) const;
1334 const TargetRegisterInfo *TRI) const { in getMemOperandsWithOffsetWidth()
1353 const TargetRegisterInfo *TRI) const { in getAddrModeFromMemoryOp()
1364 const TargetRegisterInfo *TRI) const { in preservesZeroValueInReg()
1419 unsigned OpIdx, const TargetRegisterInfo *TRI) const;
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64FrameLowering.h | 56 const TargetRegisterInfo *TRI) const override;
62 const TargetRegisterInfo *TRI) const override;
73 const TargetRegisterInfo *TRI,
148 createDefCFAExpressionFromSP(const TargetRegisterInfo &TRI,
150 MCCFIInstruction createCfaOffset(const TargetRegisterInfo &MRI, unsigned DwarfReg,
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| H A D | MipsInstrInfo.h | 39 class TargetRegisterInfo; variable
120 const TargetRegisterInfo *TRI) const override { in storeRegToStackSlot()
128 const TargetRegisterInfo *TRI) const override { in loadRegFromStackSlot()
136 const TargetRegisterInfo *TRI,
143 const TargetRegisterInfo *TRI,
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| H A D | MipsFrameLowering.cpp | 95 const TargetRegisterInfo *TRI = STI.getRegisterInfo(); in hasFP()
104 const TargetRegisterInfo *TRI = STI.getRegisterInfo(); in hasBP()
116 const TargetRegisterInfo &TRI = *STI.getRegisterInfo(); in estimateStackSize()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonBlockRanges.h | 29 class TargetRegisterInfo; variable
150 const MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI);
153 PrintRangeMap(const RegToRangeMap &M, const TargetRegisterInfo &I) in PrintRangeMap()
160 const TargetRegisterInfo &TRI;
165 const MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI);
173 const TargetRegisterInfo &TRI;
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.h | 240 const TargetRegisterInfo &TRI) const override;
322 const TargetRegisterInfo *TRI) const override;
329 const TargetRegisterInfo *TRI) const override;
335 const TargetRegisterInfo *TRI) const override;
360 const TargetRegisterInfo *TRI) const override;
365 const TargetRegisterInfo *TRI) const override;
472 const TargetRegisterInfo *TRI) const override;
474 const TargetRegisterInfo *TRI) const override;
476 const TargetRegisterInfo *TRI) const override;
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/AsmPrinter/ |
| H A D | DwarfExpression.h | 32 class TargetRegisterInfo; variable
221 virtual bool isFrameRegister(const TargetRegisterInfo &TRI,
249 bool addMachineReg(const TargetRegisterInfo &TRI, llvm::Register MachineReg,
328 bool addMachineRegExpression(const TargetRegisterInfo &TRI,
395 bool isFrameRegister(const TargetRegisterInfo &TRI,
425 bool isFrameRegister(const TargetRegisterInfo &TRI,
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/ |
| H A D | LanaiInstrInfo.h | 59 const TargetRegisterInfo *RegisterInfo) const override;
66 const TargetRegisterInfo *RegisterInfo) const override;
74 const TargetRegisterInfo *TRI) const override;
79 const TargetRegisterInfo *TRI) const;
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARC/ |
| H A D | ARCFrameLowering.h | 46 const TargetRegisterInfo *TRI) const override;
52 const TargetRegisterInfo *TRI) const override;
64 llvm::MachineFunction &, const llvm::TargetRegisterInfo *,
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/MSP430/ |
| H A D | MSP430InstrInfo.h | 36 const TargetRegisterInfo &getRegisterInfo() const { return RI; } in getRegisterInfo()
47 const TargetRegisterInfo *TRI) const override;
52 const TargetRegisterInfo *TRI) const override;
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/XCore/ |
| H A D | XCoreInstrInfo.h | 34 const TargetRegisterInfo &getRegisterInfo() const { return RI; } in getRegisterInfo()
73 const TargetRegisterInfo *TRI) const override;
79 const TargetRegisterInfo *TRI) const override;
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| H A D | XCoreMachineFunctionInfo.cpp | 39 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in createLRSpillSlot()
57 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in createFPSpillSlot()
70 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in createEHSpillSlot()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
| H A D | SystemZFrameLowering.h | 31 const TargetRegisterInfo *TRI,
38 const TargetRegisterInfo *TRI) const override;
43 const TargetRegisterInfo *TRI) const override;
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPURegisterBankInfo.h | 31 class TargetRegisterInfo; variable
111 const TargetRegisterInfo &TRI) const;
116 const TargetRegisterInfo &TRI) const;
121 const TargetRegisterInfo &TRI) const;
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/ |
| H A D | RegisterBank.cpp | 32 bool RegisterBank::verify(const TargetRegisterInfo &TRI) const { in verify()
82 LLVM_DUMP_METHOD void RegisterBank::dump(const TargetRegisterInfo *TRI) const { in dump()
88 const TargetRegisterInfo *TRI) const { in print()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCFrameLowering.h | 123 const TargetRegisterInfo *TRI) const override;
129 const TargetRegisterInfo *TRI,
140 const TargetRegisterInfo *TRI) const override;
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