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Searched refs:TREG_ZERO (Results 1 – 11 of 11) sorted by relevance

/netbsd-src/external/gpl3/binutils/dist/opcodes/
H A Dtilegx-opc.c29 #define TREG_ZERO 63 macro
47 { "bpt", TILEGX_OPC_BPT, 0x2, 0, TREG_ZERO, 0,
66 { "info", TILEGX_OPC_INFO, 0xf, 1, TREG_ZERO, 1,
85 { "infol", TILEGX_OPC_INFOL, 0x3, 1, TREG_ZERO, 1,
104 { "ld4s_tls", TILEGX_OPC_LD4S_TLS, 0x2, 3, TREG_ZERO, 1,
123 { "ld_tls", TILEGX_OPC_LD_TLS, 0x2, 3, TREG_ZERO, 1,
142 { "move", TILEGX_OPC_MOVE, 0xf, 2, TREG_ZERO, 1,
161 { "movei", TILEGX_OPC_MOVEI, 0xf, 2, TREG_ZERO, 1,
180 { "moveli", TILEGX_OPC_MOVELI, 0x3, 2, TREG_ZERO, 1,
199 { "prefetch", TILEGX_OPC_PREFETCH, 0x12, 1, TREG_ZERO, 1,
[all …]
H A Dtilepro-opc.c29 #define TREG_ZERO 63 macro
47 { "bpt", TILEPRO_OPC_BPT, 0x2, 0, TREG_ZERO, 0,
66 { "info", TILEPRO_OPC_INFO, 0xf, 1, TREG_ZERO, 1,
85 { "infol", TILEPRO_OPC_INFOL, 0x3, 1, TREG_ZERO, 1,
104 { "j", TILEPRO_OPC_J, 0x2, 1, TREG_ZERO, 1,
142 { "lw_tls", TILEPRO_OPC_LW_TLS, 0x2, 3, TREG_ZERO, 1,
180 { "move", TILEPRO_OPC_MOVE, 0xf, 2, TREG_ZERO, 1,
218 { "movei", TILEPRO_OPC_MOVEI, 0xf, 2, TREG_ZERO, 1,
256 { "moveli", TILEPRO_OPC_MOVELI, 0x3, 2, TREG_ZERO, 1,
313 { "prefetch", TILEPRO_OPC_PREFETCH, 0x12, 1, TREG_ZERO, 1,
[all …]
H A Dtilepro-dis.c31 #define TREG_ZERO 63 macro
181 TREG_ZERO, in print_insn_tilepro()
/netbsd-src/external/gpl3/binutils.old/dist/opcodes/
H A Dtilegx-opc.c29 #define TREG_ZERO 63 macro
47 { "bpt", TILEGX_OPC_BPT, 0x2, 0, TREG_ZERO, 0,
66 { "info", TILEGX_OPC_INFO, 0xf, 1, TREG_ZERO, 1,
85 { "infol", TILEGX_OPC_INFOL, 0x3, 1, TREG_ZERO, 1,
104 { "ld4s_tls", TILEGX_OPC_LD4S_TLS, 0x2, 3, TREG_ZERO, 1,
123 { "ld_tls", TILEGX_OPC_LD_TLS, 0x2, 3, TREG_ZERO, 1,
142 { "move", TILEGX_OPC_MOVE, 0xf, 2, TREG_ZERO, 1,
161 { "movei", TILEGX_OPC_MOVEI, 0xf, 2, TREG_ZERO, 1,
180 { "moveli", TILEGX_OPC_MOVELI, 0x3, 2, TREG_ZERO, 1,
199 { "prefetch", TILEGX_OPC_PREFETCH, 0x12, 1, TREG_ZERO, 1,
[all …]
H A Dtilepro-opc.c29 #define TREG_ZERO 63 macro
47 { "bpt", TILEPRO_OPC_BPT, 0x2, 0, TREG_ZERO, 0,
66 { "info", TILEPRO_OPC_INFO, 0xf, 1, TREG_ZERO, 1,
85 { "infol", TILEPRO_OPC_INFOL, 0x3, 1, TREG_ZERO, 1,
104 { "j", TILEPRO_OPC_J, 0x2, 1, TREG_ZERO, 1,
142 { "lw_tls", TILEPRO_OPC_LW_TLS, 0x2, 3, TREG_ZERO, 1,
180 { "move", TILEPRO_OPC_MOVE, 0xf, 2, TREG_ZERO, 1,
218 { "movei", TILEPRO_OPC_MOVEI, 0xf, 2, TREG_ZERO, 1,
256 { "moveli", TILEPRO_OPC_MOVELI, 0x3, 2, TREG_ZERO, 1,
313 { "prefetch", TILEPRO_OPC_PREFETCH, 0x12, 1, TREG_ZERO, 1,
[all …]
H A Dtilepro-dis.c31 #define TREG_ZERO 63 macro
181 TREG_ZERO, in print_insn_tilepro()
/netbsd-src/sys/external/bsd/sljit/dist/sljit_src/
H A DsljitNativeTILEGX-encoder.c41 #define TREG_ZERO 63 macro
2001 { "bpt", TILEGX_OPC_BPT, 0x2, 0, TREG_ZERO, 0,
2020 { "info", TILEGX_OPC_INFO, 0xf, 1, TREG_ZERO, 1,
2039 { "infol", TILEGX_OPC_INFOL, 0x3, 1, TREG_ZERO, 1,
2058 { "ld4s_tls", TILEGX_OPC_LD4S_TLS, 0x2, 3, TREG_ZERO, 1,
2077 { "ld_tls", TILEGX_OPC_LD_TLS, 0x2, 3, TREG_ZERO, 1,
2096 { "move", TILEGX_OPC_MOVE, 0xf, 2, TREG_ZERO, 1,
2115 { "movei", TILEGX_OPC_MOVEI, 0xf, 2, TREG_ZERO, 1,
2134 { "moveli", TILEGX_OPC_MOVELI, 0x3, 2, TREG_ZERO, 1,
2153 { "prefetch", TILEGX_OPC_PREFETCH, 0x12, 1, TREG_ZERO, 1,
[all …]
/netbsd-src/external/gpl3/binutils.old/dist/gas/config/
H A Dtc-tilepro.c40 #define TREG_ZERO 63 macro
716 regs &= ~((uint64_t) 1 << TREG_ZERO); in check_illegal_reg_writes()
H A Dtc-tilegx.c40 #define TREG_ZERO 63 macro
828 regs &= ~((uint64_t) 1 << TREG_ZERO); in check_illegal_reg_writes()
/netbsd-src/external/gpl3/binutils/dist/gas/config/
H A Dtc-tilepro.c40 #define TREG_ZERO 63 macro
716 regs &= ~((uint64_t) 1 << TREG_ZERO); in check_illegal_reg_writes()
H A Dtc-tilegx.c40 #define TREG_ZERO 63 macro
828 regs &= ~((uint64_t) 1 << TREG_ZERO); in check_illegal_reg_writes()