Searched refs:SuccPred (Results 1 – 2 of 2) sorted by relevance
836 for (MachineBasicBlock *SuccPred : Succ->predecessors()) { in isProfitableToTailDup()837 if (SuccPred == Succ || SuccPred == BB in isProfitableToTailDup()838 || BlockToChain[SuccPred] == &Chain in isProfitableToTailDup()839 || (BlockFilter && !BlockFilter->count(SuccPred))) in isProfitableToTailDup()841 auto Freq = MBFI->getBlockFreq(SuccPred) in isProfitableToTailDup()842 * MBPI->getEdgeProbability(SuccPred, Succ); in isProfitableToTailDup()948 for (auto SuccPred : Succ->predecessors()) { in isTrellis() local950 if (Successors.count(SuccPred)) { in isTrellis()952 for (MachineBasicBlock *CheckSucc : SuccPred->successors()) in isTrellis()957 const BlockChain *PredChain = BlockToChain[SuccPred]; in isTrellis()[all …]
2852 for (const SDep &SuccPred : SuccSU->Preds) { in canClobberReachingPhysRegUse() local2853 if (!SuccPred.isAssignedRegDep()) in canClobberReachingPhysRegUse()2857 MachineOperand::clobbersPhysReg(RegMask, SuccPred.getReg()) && in canClobberReachingPhysRegUse()2858 scheduleDAG->IsReachable(DepSU, SuccPred.getSUnit())) in canClobberReachingPhysRegUse()2866 if (TRI->regsOverlap(*ImpDef, SuccPred.getReg()) && in canClobberReachingPhysRegUse()2867 scheduleDAG->IsReachable(DepSU, SuccPred.getSUnit())) in canClobberReachingPhysRegUse()