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Searched refs:SubRegIndices (Results 1 – 24 of 24) sorted by relevance

/netbsd-src/external/apache2/llvm/dist/llvm/utils/TableGen/
H A DRegisterInfoEmitter.cpp170 auto &SubRegIndices = Bank.getSubRegIndices(); in runEnums() local
171 if (!SubRegIndices.empty()) { in runEnums()
173 std::string Namespace = SubRegIndices.front().getNamespace(); in runEnums()
178 for (const auto &Idx : SubRegIndices) in runEnums()
699 const auto &SubRegIndices = RegBank.getSubRegIndices(); in emitComposeSubRegIndices() local
715 std::distance(SubRegIndices.begin(), SubRegIndices.end()); in emitComposeSubRegIndices()
716 for (const auto &Idx : SubRegIndices) { in emitComposeSubRegIndices()
770 const auto &SubRegIndices = RegBank.getSubRegIndices(); in emitComposeSubRegIndexLaneMask() local
775 for (const auto &Idx : SubRegIndices) { in emitComposeSubRegIndexLaneMask()
819 for (size_t i = 0, e = SubRegIndices.size(); i != e; ++i) { in emitComposeSubRegIndexLaneMask()
[all …]
H A DCodeGenRegisters.cpp1117 for (auto &Idx : SubRegIndices) in CodeGenRegBank()
1159 for (CodeGenSubRegIndex &SRI : SubRegIndices) { in CodeGenRegBank()
1220 SubRegIndices.emplace_back(Name, Namespace, SubRegIndices.size() + 1); in createSubRegIndex()
1221 return &SubRegIndices.back(); in createSubRegIndex()
1228 SubRegIndices.emplace_back(Def, SubRegIndices.size() + 1); in getSubRegIdx()
1229 Idx = &SubRegIndices.back(); in getSubRegIdx()
1379 for (const CodeGenSubRegIndex &Idx : SubRegIndices) in computeComposites()
1439 for (auto &Idx : SubRegIndices) { in computeSubRegLaneMasks()
1460 for (const auto &Idx : SubRegIndices) { in computeSubRegLaneMasks()
1479 for (auto &Idx2 : SubRegIndices) { in computeSubRegLaneMasks()
[all …]
H A DCodeGenRegisters.h535 std::deque<CodeGenSubRegIndex> SubRegIndices; variable
632 return SubRegIndices; in getSubRegIndices()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/MC/
H A DMCRegisterInfo.cpp37 const uint16_t *SRI = SubRegIndices + get(Reg).SubRegIndices; in getSubReg()
49 const uint16_t *SRI = SubRegIndices + get(Reg).SubRegIndices; in getSubRegIndex()
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/MC/
H A DMCRegisterInfo.h112 uint32_t SubRegIndices; member
169 const uint16_t *SubRegIndices; // Pointer to the subreg lookup variable
378 SubRegIndices = SubIndices; in InitMCRegisterInfo()
616 SRIndex = MCRI->SubRegIndices + MCRI->get(Reg).SubRegIndices; in MCSubRegIndexIterator()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
H A DPPCRegisterInfo.td41 let SubRegIndices = [sub_32];
48 let SubRegIndices = [sub_32];
73 let SubRegIndices = [sub_64];
81 let SubRegIndices = [sub_64];
171 let SubRegIndices = [sub_vsx0, sub_vsx1] in {
235 let SubRegIndices = [sub_lt, sub_gt, sub_eq, sub_un] in {
424 let SubRegIndices = [sub_pair0, sub_pair1] in {
439 let SubRegIndices = [sub_pair0, sub_pair1] in {
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonRegisterInfo.td111 let SubRegIndices = [isub_lo, isub_hi], CoveredBySubRegs = 1 in {
143 let SubRegIndices = [subreg_overflow];
180 let SubRegIndices = [isub_lo, isub_hi], CoveredBySubRegs = 1 in {
206 let SubRegIndices = [vsub_lo, vsub_hi, vsub_fake], CoveredBySubRegs = 1 in {
226 let SubRegIndices = [vsub_lo, vsub_hi, vsub_fake], CoveredBySubRegs = 1 in {
246 let SubRegIndices = [wsub_lo, wsub_hi], CoveredBySubRegs = 1 in {
298 let SubRegIndices = [isub_lo, isub_hi], CoveredBySubRegs = 1 in {
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
H A DMipsRegisterInfo.td46 let SubRegIndices = [sub_32];
55 let SubRegIndices = [sub_lo, sub_hi];
61 let SubRegIndices = [sub_lo, sub_hi];
68 let SubRegIndices = [sub_64];
74 let SubRegIndices = [sub_lo, sub_hi];
190 let SubRegIndices = [sub_32] in {
246 let SubRegIndices = [sub_dsp16_19, sub_dsp20, sub_dsp21, sub_dsp22,
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/VE/
H A DVERegisterInfo.td115 let SubRegIndices = [sub_i32, sub_f32], CoveredBySubRegs = 1 in {
136 let SubRegIndices = [sub_even, sub_odd], CoveredBySubRegs = 1 in
155 let SubRegIndices = [sub_vm_even, sub_vm_odd], CoveredBySubRegs = 1 in
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
H A DSystemZRegisterInfo.td70 let SubRegIndices = [subreg_l32, subreg_h32];
78 let SubRegIndices = [subreg_l64, subreg_h64];
213 let SubRegIndices = [subreg_h32];
220 let SubRegIndices = [subreg_l64, subreg_h64];
256 let SubRegIndices = [subreg_h64];
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86RegisterInfo.td114 let SubRegIndices = [sub_8bit, sub_8bit_hi], CoveredBySubRegs = 1 in {
120 let SubRegIndices = [sub_8bit, sub_8bit_hi_phony], CoveredBySubRegs = 1 in {
129 let SubRegIndices = [sub_8bit, sub_8bit_hi_phony], CostPerUse = [1],
142 let SubRegIndices = [sub_16bit, sub_16bit_hi], CoveredBySubRegs = 1 in {
155 let SubRegIndices = [sub_16bit, sub_16bit_hi], CostPerUse = [1],
168 let SubRegIndices = [sub_32bit] in {
253 let SubRegIndices = [sub_xmm] in {
261 let SubRegIndices = [sub_ymm] in {
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
H A DRISCVRegisterInfo.td28 let SubRegIndices = [sub_16];
40 let SubRegIndices = [sub_32];
419 let SubRegIndices = [sub_vrm1_0, sub_vrm1_1];
429 let SubRegIndices = [sub_vrm2_0, sub_vrm2_1];
439 let SubRegIndices = [sub_vrm4_0, sub_vrm4_1];
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/BPF/
H A DBPFRegisterInfo.td28 let SubRegIndices = [sub_32];
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DSIRegisterInfo.td149 let SubRegIndices = [lo16, hi16];
177 let SubRegIndices = [sub0, sub1];
186 let SubRegIndices = [sub0, sub1];
225 let SubRegIndices = [sub0, sub1];
235 let SubRegIndices = [sub0, sub1];
244 let SubRegIndices = [sub0, sub1];
263 let SubRegIndices = [sub0, sub1];
394 let SubRegIndices = indices;
H A DR600RegisterInfo.td23 let SubRegIndices = [sub0, sub1, sub2, sub3];
32 let SubRegIndices = [sub0, sub1];
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/CSKY/
H A DCSKYRegisterInfo.td35 let SubRegIndices = [sub32_0];
43 let SubRegIndices = [sub64_0];
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/
H A DLanaiRegisterInfo.td30 let SubRegIndices = [sub_32] in {
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/MSP430/
H A DMSP430RegisterInfo.td54 let SubRegIndices = [subreg_8bit] in {
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/
H A DSparcRegisterInfo.td37 let SubRegIndices = [sub_even, sub_odd];
46 let SubRegIndices = [sub_even, sub_odd];
53 let SubRegIndices = [sub_even64, sub_odd64];
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/M68k/
H A DM68kRegisterInfo.td23 let SubRegIndices = SUBIDX;
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64RegisterInfo.td94 let SubRegIndices = [sub_32] in {
285 let SubRegIndices = [bsub] in {
320 let SubRegIndices = [hsub] in {
355 let SubRegIndices = [ssub], RegAltNameIndices = [vreg, vlist1] in {
390 let SubRegIndices = [dsub], RegAltNameIndices = [vreg, vlist1] in {
794 let SubRegIndices = [zsub,zsub_hi] in {
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
H A DARMRegisterInfo.td118 let SubRegIndices = [ssub_0, ssub_1] in {
156 let SubRegIndices = [dsub_0, dsub_1] in {
166 let SubRegIndices = [dsub_0, dsub_1] in {
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AVR/
H A DAVRRegisterInfo.td79 let SubRegIndices = [sub_lo, sub_hi],
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/Target/
H A DTarget.td147 // SubRegIndices - For each register in SubRegs, specify the SubRegIndex used
150 list<SubRegIndex> SubRegIndices = [];
359 // let SubRegIndices = [sube, subo] in {
381 // SubRegIndices - N SubRegIndex instances. This provides the names of the
383 list<SubRegIndex> SubRegIndices = Indices;