/netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineSimplifyDemanded.cpp | 71 bool InstCombinerImpl::SimplifyDemandedBits(Instruction *I, unsigned OpNo, in SimplifyDemandedBits() function in InstCombinerImpl 163 if (SimplifyDemandedBits(I, 1, DemandedMask, RHSKnown, Depth + 1) || in SimplifyDemandedUseBits() 164 SimplifyDemandedBits(I, 0, DemandedMask & ~RHSKnown.Zero, LHSKnown, in SimplifyDemandedUseBits() 192 if (SimplifyDemandedBits(I, 1, DemandedMask, RHSKnown, Depth + 1) || in SimplifyDemandedUseBits() 193 SimplifyDemandedBits(I, 0, DemandedMask & ~RHSKnown.One, LHSKnown, in SimplifyDemandedUseBits() 220 if (SimplifyDemandedBits(I, 1, DemandedMask, RHSKnown, Depth + 1) || in SimplifyDemandedUseBits() 221 SimplifyDemandedBits(I, 0, DemandedMask, LHSKnown, Depth + 1)) in SimplifyDemandedUseBits() 341 if (SimplifyDemandedBits(I, 2, DemandedMask, RHSKnown, Depth + 1) || in SimplifyDemandedUseBits() 342 SimplifyDemandedBits(I, 1, DemandedMask, LHSKnown, Depth + 1)) in SimplifyDemandedUseBits() 394 if (SimplifyDemandedBits(I, 0, InputDemandedMask, InputKnown, Depth + 1)) in SimplifyDemandedUseBits() [all …]
|
H A D | InstCombineInternal.h | 577 bool SimplifyDemandedBits(Instruction *I, unsigned Op,
|
H A D | InstCombineCalls.cpp | 1141 if (SimplifyDemandedBits(II, 2, Op2Demanded, Op2Known)) in visitCallInst()
|
H A D | InstCombineCompares.cpp | 5049 if (SimplifyDemandedBits(&I, 0, in foldICmpUsingKnownBits() 5054 if (SimplifyDemandedBits(&I, 1, APInt::getAllOnesValue(BitWidth), in foldICmpUsingKnownBits()
|
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
H A D | TargetLowering.cpp | 601 bool TargetLowering::SimplifyDemandedBits(SDValue Op, const APInt &DemandedBits, in SimplifyDemandedBits() function in TargetLowering 608 bool Simplified = SimplifyDemandedBits(Op, DemandedBits, Known, TLO); in SimplifyDemandedBits() 616 bool TargetLowering::SimplifyDemandedBits(SDValue Op, const APInt &DemandedBits, in SimplifyDemandedBits() function in TargetLowering 635 return SimplifyDemandedBits(Op, DemandedBits, DemandedElts, Known, TLO, Depth, in SimplifyDemandedBits() 899 bool TargetLowering::SimplifyDemandedBits( in SimplifyDemandedBits() function in TargetLowering 976 if (SimplifyDemandedBits(Src, SrcDemandedBits, SrcKnown, TLO, Depth + 1)) in SimplifyDemandedBits() 1026 if (SimplifyDemandedBits(Scl, DemandedSclBits, KnownScl, TLO, Depth + 1)) in SimplifyDemandedBits() 1032 if (SimplifyDemandedBits(Vec, DemandedBits, DemandedVecElts, KnownVec, TLO, in SimplifyDemandedBits() 1053 if (SimplifyDemandedBits(Sub, DemandedBits, DemandedSubElts, KnownSub, TLO, in SimplifyDemandedBits() 1056 if (SimplifyDemandedBits(Src, DemandedBits, DemandedSrcElts, KnownSrc, TLO, in SimplifyDemandedBits() [all …]
|
H A D | DAGCombiner.cpp | 320 bool SimplifyDemandedBits(SDValue Op) { in SimplifyDemandedBits() function in __anon58e6a55b0111::DAGCombiner 323 return SimplifyDemandedBits(Op, DemandedBits); in SimplifyDemandedBits() 326 bool SimplifyDemandedBits(SDValue Op, const APInt &DemandedBits) { in SimplifyDemandedBits() function in __anon58e6a55b0111::DAGCombiner 329 if (!TLI.SimplifyDemandedBits(Op, DemandedBits, Known, TLO, 0, false)) in SimplifyDemandedBits() 352 bool SimplifyDemandedBits(SDValue Op, const APInt &DemandedBits, 1158 bool DAGCombiner::SimplifyDemandedBits(SDValue Op, const APInt &DemandedBits, in SimplifyDemandedBits() function in DAGCombiner 1163 if (!TLI.SimplifyDemandedBits(Op, DemandedBits, DemandedElts, Known, TLO, 0, in SimplifyDemandedBits() 2413 if (SimplifyDemandedBits(SDValue(N, 0))) in visitADDLike() 4775 if (SimplifyDemandedBits(SDValue(N, 0))) in visitIMINMAX() 5877 if (SimplifyDemandedBits(SDValue(N, 0))) in visitAND() [all …]
|
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/Transforms/InstCombine/ |
H A D | InstCombiner.h | 515 virtual bool SimplifyDemandedBits(Instruction *I, unsigned OpNo,
|
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
H A D | RISCVISelLowering.cpp | 5574 if (SimplifyDemandedBits(N->getOperand(0), LHSMask, DCI) || in PerformDAGCombine() 5575 SimplifyDemandedBits(N->getOperand(1), RHSMask, DCI)) { in PerformDAGCombine() 5587 if (SimplifyDemandedBits(Op0, Mask, DCI)) { in PerformDAGCombine() 5601 if (SimplifyDemandedBits(ShAmt, ShAmtMask, DCI)) { in PerformDAGCombine() 5617 if (SimplifyDemandedBits(Op0, OpMask, DCI) || in PerformDAGCombine() 5618 SimplifyDemandedBits(Op1, OpMask, DCI) || in PerformDAGCombine() 5619 SimplifyDemandedBits(ShAmt, ShAmtMask, DCI)) { in PerformDAGCombine() 5633 if (SimplifyDemandedBits(ShAmt, ShAmtMask, DCI)) { in PerformDAGCombine() 5648 if (SimplifyDemandedBits(LHS, LHSMask, DCI) || in PerformDAGCombine() 5649 SimplifyDemandedBits(RHS, RHSMask, DCI)) { in PerformDAGCombine() [all …]
|
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
H A D | TargetLowering.h | 3333 bool SimplifyDemandedBits(SDValue Op, const APInt &DemandedBits, 3340 bool SimplifyDemandedBits(SDValue Op, const APInt &DemandedBits, 3347 bool SimplifyDemandedBits(SDValue Op, const APInt &DemandedBits,
|
/netbsd-src/external/apache2/llvm/dist/llvm/docs/ |
H A D | XRayExample.rst | 93 …00019] 0.000138 TargetLowering.cpp:506:0: llvm::TargetLowering::SimplifyDemandedBits(llvm::SDVal…
|
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
H A D | ARMTargetTransformInfo.cpp | 187 if (IC.SimplifyDemandedBits(&II, 0, APInt::getLowBitsSet(32, 16), in instCombineIntrinsic() 218 if (IC.SimplifyDemandedBits(&II, CarryOp, APInt::getOneBitSet(32, 29), in instCombineIntrinsic()
|
H A D | ARMISelLowering.cpp | 14083 if (TLI.SimplifyDemandedBits(Op0, DemandedMask, DCI)) in PerformVMOVhrCombine() 14288 if (TLI.SimplifyDemandedBits(Op, DemandedMask, DCI)) in PerformPREDICATE_CASTCombine() 16039 if (SimplifyDemandedBits(N->getOperand(3), DemandedMask, DCI)) in PerformIntrinsicCombine() 16056 if (SimplifyDemandedBits(N->getOperand(1), DemandedMask, DCI)) in PerformIntrinsicCombine() 17036 if (SimplifyDemandedBits(N->getOperand(1), DemandedMask, DCI)) in PerformDAGCombine() 17043 if (SimplifyDemandedBits(N->getOperand(1), DemandedMask, DCI)) in PerformDAGCombine() 17052 if ((SimplifyDemandedBits(N->getOperand(0), DemandedMask, DCI)) || in PerformDAGCombine() 17053 (SimplifyDemandedBits(N->getOperand(1), DemandedMask, DCI))) in PerformDAGCombine() 17062 if ((SimplifyDemandedBits(N->getOperand(0), LowMask, DCI)) || in PerformDAGCombine() 17063 (SimplifyDemandedBits(N->getOperand(1), HighMask, DCI))) in PerformDAGCombine() [all …]
|
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/XCore/ |
H A D | XCoreISelLowering.cpp | 1610 TLI.SimplifyDemandedBits(OutVal, DemandedMask, Known, TLO)) in PerformDAGCombine() 1626 TLI.SimplifyDemandedBits(Time, DemandedMask, Known, TLO)) in PerformDAGCombine()
|
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 38983 if (SimplifyDemandedBits(Src, TruncMask, DemandedElts, KnownOp, TLO, Depth + 1)) in SimplifyDemandedBitsForTargetNode() 38995 if (SimplifyDemandedBits(LHS, DemandedMask, OriginalDemandedElts, KnownOp, in SimplifyDemandedBitsForTargetNode() 38998 if (SimplifyDemandedBits(RHS, DemandedMask, OriginalDemandedElts, KnownOp, in SimplifyDemandedBitsForTargetNode() 39051 if (SimplifyDemandedBits(Op0, DemandedMask, OriginalDemandedElts, Known, in SimplifyDemandedBitsForTargetNode() 39070 if (SimplifyDemandedBits(Op.getOperand(0), DemandedMask, in SimplifyDemandedBitsForTargetNode() 39111 if (SimplifyDemandedBits(Op0, DemandedMask, OriginalDemandedElts, Known, in SimplifyDemandedBitsForTargetNode() 39155 if (SimplifyDemandedBits(Vec, DemandedVecBits, DemandedVecElts, in SimplifyDemandedBitsForTargetNode() 39184 if (SimplifyDemandedBits(Vec, OriginalDemandedBits, DemandedVecElts, in SimplifyDemandedBitsForTargetNode() 39191 if (SimplifyDemandedBits(Scl, DemandedSclBits, KnownScl, TLO, Depth + 1)) in SimplifyDemandedBitsForTargetNode() 39210 if (SimplifyDemandedBits(Op.getOperand(0), SignMask, DemandedLHS, in SimplifyDemandedBitsForTargetNode() [all …]
|
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUISelLowering.cpp | 2814 if (TLI.SimplifyDemandedBits(LHS, Demanded, DCI)) in simplifyMul24() 2816 if (TLI.SimplifyDemandedBits(RHS, Demanded, DCI)) in simplifyMul24() 4073 TLI.SimplifyDemandedBits(BitsFrom, Demanded, Known, TLO)) { in PerformDAGCombine()
|
H A D | SIISelLowering.cpp | 10792 if (TLI.SimplifyDemandedBits(Src, DemandedBits, DCI)) { in performCvtF32UByteNCombine()
|
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ |
H A D | README.txt | 2166 SimplifyDemandedBits shrinks the "and" constant to 2 but instcombine misses the
|
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 14671 if (TLI.SimplifyDemandedBits(Op, DemandedMask, DCI)) in performVectorShiftCombine() 14794 if (TLI.SimplifyDemandedBits(Addr, DemandedMask, Known, TLO)) { in performTBISimplification()
|