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Searched refs:SQ_MUBUF_0__ENCODING__SHIFT (Results 1 – 7 of 7) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h9139 #define SQ_MUBUF_0__ENCODING__SHIFT 0x0000001a macro
H A Dgfx_7_2_sh_mask.h13014 #define SQ_MUBUF_0__ENCODING__SHIFT 0x1a macro
H A Dgfx_8_1_sh_mask.h15296 #define SQ_MUBUF_0__ENCODING__SHIFT 0x1a macro
H A Dgfx_8_0_sh_mask.h14898 #define SQ_MUBUF_0__ENCODING__SHIFT 0x1a macro
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h2833 #define SQ_MUBUF_0__ENCODING__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h2639 #define SQ_MUBUF_0__ENCODING__SHIFT … macro
H A Dgc_9_1_sh_mask.h2681 #define SQ_MUBUF_0__ENCODING__SHIFT … macro