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Searched refs:SPI_START_PHASE__VGPR_START_PHASE_MASK (Results 1 – 5 of 5) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
H A Dgfx_8_1_sh_mask.h11221 #define SPI_START_PHASE__VGPR_START_PHASE_MASK 0x3 macro
H A Dgfx_8_0_sh_mask.h10823 #define SPI_START_PHASE__VGPR_START_PHASE_MASK 0x3 macro
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h4166 #define SPI_START_PHASE__VGPR_START_PHASE_MASK … macro
H A Dgc_9_2_1_sh_mask.h3565 #define SPI_START_PHASE__VGPR_START_PHASE_MASK … macro
H A Dgc_9_1_sh_mask.h3701 #define SPI_START_PHASE__VGPR_START_PHASE_MASK … macro