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Searched refs:SPI_RESOURCE_RESERVE_CU_5__BARRIERS_MASK (Results 1 – 7 of 7) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h8961 #define SPI_RESOURCE_RESERVE_CU_5__BARRIERS_MASK 0x78000 macro
H A Dgfx_8_1_sh_mask.h10979 #define SPI_RESOURCE_RESERVE_CU_5__BARRIERS_MASK 0x78000 macro
H A Dgfx_8_0_sh_mask.h10581 #define SPI_RESOURCE_RESERVE_CU_5__BARRIERS_MASK 0x78000 macro
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h12468 #define SPI_RESOURCE_RESERVE_CU_5__BARRIERS_MASK … macro
H A Dgc_9_2_1_sh_mask.h13637 #define SPI_RESOURCE_RESERVE_CU_5__BARRIERS_MASK … macro
H A Dgc_9_1_sh_mask.h13772 #define SPI_RESOURCE_RESERVE_CU_5__BARRIERS_MASK … macro
H A Dgc_10_1_0_sh_mask.h19715 #define SPI_RESOURCE_RESERVE_CU_5__BARRIERS_MASK … macro