/netbsd-src/external/gpl3/gcc/dist/gcc/config/arm/ |
H A D | t-aprofile | 32 # ARMv7-A - build nofp, fp-d16 and SIMD variants 40 # ARMv7VE - only build a SIMD (+VFPv4) variant. 44 # ARMv8-A - build nofp and SIMD variants. 64 # Map all v7-a SIMD variants to neon-vfpv3 (+simd) 72 # Neither FP nor SIMD: map v7ve to v7-a 79 # ARMv7ve with SIMD, but SIMD is less capable than the default - map down to v7-a+simd 83 # ARMv8 without SIMD: map down to base architecture 87 # ARMv8 with SIMD: map down to base arch + simd 96 # Map all v8.1-a SIMD variants to v8-a+simd 106 # Map all v8.2-a and v8.3-a SIMD variants to v8-a+simd [all …]
|
H A D | t-multilib | 152 # ARMv7ve FP/SIMD variants: map down to v7+fp 161 # ARMv8 with SIMD 170 # Map all v8.1-a SIMD variants 180 # Map all v8.2-a SIMD variants. v8.3-a SIMD variants have the same mappings 188 # Map all v8.4-a SIMD variants 195 # Map all v8.5-a SIMD variants 202 # Map all v8.6-a SIMD variants 209 # Armv9 with SIMD
|
H A D | cortex-a53.md | 291 ;; Floating-point/Advanced SIMD. 297 ;; Broad Advanced SIMD type categorisation 453 ;; Floating-point/Advanced SIMD functional units. 456 ;; We model the Advanced SIMD unit as two 64-bit units, each with three 458 ;; for 128-bit Advanced SIMD instructions, which use both units. 460 ;; The floating-point/Advanced SIMD ALU pipelines. 474 ;; The floating-point/Advanced SIMD multiply/multiply-accumulate 489 ;; Floating-point/Advanced SIMD divide/square root. 610 ;; Advanced SIMD. 639 ;; SIMD Dividers. [all …]
|
/netbsd-src/external/gpl3/gcc.old/dist/gcc/config/arm/ |
H A D | t-aprofile | 32 # ARMv7-A - build nofp, fp-d16 and SIMD variants 40 # ARMv7VE - only build a SIMD (+VFPv4) variant. 44 # ARMv8-A - build nofp and SIMD variants. 64 # Map all v7-a SIMD variants to neon-vfpv3 (+simd) 72 # Neither FP nor SIMD: map v7ve to v7-a 79 # ARMv7ve with SIMD, but SIMD is less capable than the default - map down to v7-a+simd 83 # ARMv8 without SIMD: map down to base architecture 87 # ARMv8 with SIMD: map down to base arch + simd 96 # Map all v8.1-a SIMD variants to v8-a+simd 106 # Map all v8.2-a and v8.3-a SIMD variants to v8-a+simd [all …]
|
H A D | t-multilib | 151 # ARMv7ve FP/SIMD variants: map down to v7+fp 160 # ARMv8 with SIMD 169 # Map all v8.1-a SIMD variants 179 # Map all v8.2-a SIMD variants. v8.3-a SIMD variants have the same mappings 187 # Map all v8.4-a SIMD variants 194 # Map all v8.5-a SIMD variants 201 # Map all v8.6-a SIMD variants
|
H A D | cortex-a53.md | 291 ;; Floating-point/Advanced SIMD. 297 ;; Broad Advanced SIMD type categorisation 453 ;; Floating-point/Advanced SIMD functional units. 456 ;; We model the Advanced SIMD unit as two 64-bit units, each with three 458 ;; for 128-bit Advanced SIMD instructions, which use both units. 460 ;; The floating-point/Advanced SIMD ALU pipelines. 474 ;; The floating-point/Advanced SIMD multiply/multiply-accumulate 489 ;; Floating-point/Advanced SIMD divide/square root. 610 ;; Advanced SIMD. 639 ;; SIMD Dividers. [all …]
|
/netbsd-src/external/lgpl3/gmp/dist/mpn/x86_64/bd1/ |
H A D | README | 3 We currently make limited use of SIMD instructions, both via the MPN_PATH and 6 The bd1 cores share one SIMD/FPU pipeline for two integer units. This probably 8 is significant SIMD dependency. 11 SIMD code.
|
/netbsd-src/external/gpl3/gcc.old/dist/gcc/ |
H A D | mode-classes.def | 34 DEF_MODE_CLASS (MODE_VECTOR_INT), /* SIMD vectors */ \ 35 DEF_MODE_CLASS (MODE_VECTOR_FRACT), /* SIMD vectors */ \ 36 DEF_MODE_CLASS (MODE_VECTOR_UFRACT), /* SIMD vectors */ \ 37 DEF_MODE_CLASS (MODE_VECTOR_ACCUM), /* SIMD vectors */ \ 38 DEF_MODE_CLASS (MODE_VECTOR_UACCUM), /* SIMD vectors */ \
|
/netbsd-src/external/gpl3/gcc/dist/gcc/ |
H A D | mode-classes.def | 34 DEF_MODE_CLASS (MODE_VECTOR_INT), /* SIMD vectors */ \ 35 DEF_MODE_CLASS (MODE_VECTOR_FRACT), /* SIMD vectors */ \ 36 DEF_MODE_CLASS (MODE_VECTOR_UFRACT), /* SIMD vectors */ \ 37 DEF_MODE_CLASS (MODE_VECTOR_ACCUM), /* SIMD vectors */ \ 38 DEF_MODE_CLASS (MODE_VECTOR_UACCUM), /* SIMD vectors */ \
|
/netbsd-src/external/gpl3/gcc/dist/gcc/config/arc/ |
H A D | builtins.def | 62 /* ARC SIMD extenssion. */ 63 /* BEGIN SIMD marker. */ 162 /* SIMD special DIb, rlimm, rlimm instructions. */ 166 /* SIMD special DIb, limm, rlimm instructions. */ 194 /* END SIMD marker. */ 197 /* ARCv2 SIMD instructions that use/clobber the accumulator reg. */ 216 /* Combined add/sub HS SIMD instructions. */
|
H A D | arc-simd.h | 33 #error Use the "-msimd" flag to enable ARC SIMD support
|
/netbsd-src/external/gpl3/gcc.old/dist/gcc/config/arc/ |
H A D | builtins.def | 62 /* ARC SIMD extenssion. */ 63 /* BEGIN SIMD marker. */ 162 /* SIMD special DIb, rlimm, rlimm instructions. */ 166 /* SIMD special DIb, limm, rlimm instructions. */ 194 /* END SIMD marker. */ 197 /* ARCv2 SIMD instructions that use/clobber the accumulator reg. */ 216 /* Combined add/sub HS SIMD instructions. */
|
/netbsd-src/external/gpl3/gcc/dist/gcc/config/aarch64/ |
H A D | iterators.md | 79 ;; Integer Advanced SIMD modes. 82 ;; Advanced SIMD and scalar, 64 & 128-bit container, all integer modes. 85 ;; Advanced SIMD and scalar, 64 & 128-bit container: all Advanced SIMD 104 ;; Advanced SIMD, 64-bit container, all integer modes. 144 ;; Advanced SIMD Float modes suitable for moving, loading and storing. 148 ;; Advanced SIMD Float modes. 154 ;; Advanced SIMD Float modes, and DF. 168 ;; Advanced SIMD single Float modes. 177 ;; All scalar and Advanced SIMD Float modes. 180 ;; Advanced SIMD Float modes with 2 elements. [all …]
|
H A D | thunderx.md | 199 ;; FP/SIMD load/stores happen in pipe 0 213 ;; FP/SIMD Stores takes one cycle in pipe 0 240 ;; SIMD/NEON (q forms take an extra cycle) 241 ;; SIMD For ThunderX is 64bit wide, 245 ;; ThunderX SIMD fabs/fneg instruction types 341 ;; Thunder 128bit SIMD reads the upper halve in cycle 2 and writes upper halve in the last cycle
|
H A D | saphira.md | 62 ;; SIMD Floating-Point Instructions 149 ;; SIMD Integer Instructions 186 ;; SIMD Load Instructions 230 ;; SIMD Miscellaneous Instructions 286 ;; SIMD Store Instructions 357 ;; No separate FP store section, these are found in the SIMD store section.
|
H A D | falkor.md | 65 ;; SIMD Floating-Point Instructions 192 ;; SIMD Integer Instructions 264 ;; SIMD Load Instructions 308 ;; SIMD Miscellaneous Instructions 404 ;; SIMD Store Instructions 480 ;; No separate FP store section, these are found in the SIMD store section.
|
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
H A D | ARMScheduleSwift.td | 556 // 4.2.28 Advanced SIMD, Integer, 2 cycle 567 // 4.2.29 Advanced SIMD, Integer, 4 cycle 568 // 4.2.30 Advanced SIMD, Integer with Accumulate 577 // 4.2.31 Advanced SIMD, Add and Shift with Narrow 584 // 4.2.32 Advanced SIMD, Vector Table Lookup 597 // 4.2.33 Advanced SIMD, Transpose 602 // 4.2.34 Advanced SIMD and VFP, Floating Point 612 // 4.2.35 Advanced SIMD and VFP, Multiply 622 // 4.2.36 Advanced SIMD and VFP, Convert 625 // 4.2.37 Advanced SIMD and VFP, Move [all …]
|
/netbsd-src/external/gpl3/gcc.old/dist/gcc/config/aarch64/ |
H A D | thunderx.md | 199 ;; FP/SIMD load/stores happen in pipe 0 213 ;; FP/SIMD Stores takes one cycle in pipe 0 240 ;; SIMD/NEON (q forms take an extra cycle) 241 ;; SIMD For ThunderX is 64bit wide, 245 ;; ThunderX SIMD fabs/fneg instruction types 341 ;; Thunder 128bit SIMD reads the upper halve in cycle 2 and writes upper halve in the last cycle
|
H A D | iterators.md | 79 ;; Integer Advanced SIMD modes. 82 ;; Advanced SIMD and scalar, 64 & 128-bit container, all integer modes. 85 ;; Advanced SIMD and scalar, 64 & 128-bit container: all Advanced SIMD 101 ;; Advanced SIMD, 64-bit container, all integer modes. 138 ;; Advanced SIMD Float modes suitable for moving, loading and storing. 142 ;; Advanced SIMD Float modes. 148 ;; Advanced SIMD Float modes, and DF. 161 ;; Advanced SIMD single Float modes. 170 ;; All scalar and Advanced SIMD Float modes. 173 ;; Advanced SIMD Float modes with 2 elements. [all …]
|
H A D | saphira.md | 62 ;; SIMD Floating-Point Instructions 149 ;; SIMD Integer Instructions 186 ;; SIMD Load Instructions 230 ;; SIMD Miscellaneous Instructions 286 ;; SIMD Store Instructions 357 ;; No separate FP store section, these are found in the SIMD store section.
|
H A D | falkor.md | 65 ;; SIMD Floating-Point Instructions 192 ;; SIMD Integer Instructions 264 ;; SIMD Load Instructions 308 ;; SIMD Miscellaneous Instructions 404 ;; SIMD Store Instructions 480 ;; No separate FP store section, these are found in the SIMD store section.
|
/netbsd-src/external/gpl3/binutils.old/dist/opcodes/ |
H A D | nds32-asm.h | 289 #define SIMD(sub) (OP6 (SIMD) | N32_SIMD_ ## sub) macro
|
/netbsd-src/external/gpl3/binutils/dist/opcodes/ |
H A D | nds32-asm.h | 289 #define SIMD(sub) (OP6 (SIMD) | N32_SIMD_ ## sub) macro
|
/netbsd-src/external/apache2/llvm/dist/clang/docs/ |
H A D | OpenMPSupport.rst | 132 | loop extension | clause: if for SIMD directives | :go… 166 | SIMD extension | atomic and simd constructs inside SIMD code | :go… 168 | SIMD extension | SIMD nontemporal | :go…
|
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/amdkfd/ |
H A D | kfd_dbgmgr.h | 86 uint32_t SIMD:2; /* SIMD id */ member
|