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Searched refs:RetVT (Results 1 – 20 of 20) sorted by relevance

/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DTargetLoweringBase.cpp216 RTLIB::Libcall RTLIB::getFPEXT(EVT OpVT, EVT RetVT) { in getFPEXT() argument
218 if (RetVT == MVT::f32) in getFPEXT()
220 if (RetVT == MVT::f64) in getFPEXT()
222 if (RetVT == MVT::f128) in getFPEXT()
225 if (RetVT == MVT::f64) in getFPEXT()
227 if (RetVT == MVT::f128) in getFPEXT()
229 if (RetVT == MVT::ppcf128) in getFPEXT()
232 if (RetVT == MVT::f128) in getFPEXT()
234 else if (RetVT == MVT::ppcf128) in getFPEXT()
237 if (RetVT == MVT::f128) in getFPEXT()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64FastISel.cpp196 bool optimizeIntExtLoad(const Instruction *I, MVT RetVT, MVT SrcVT);
201 unsigned emitAddSub(bool UseAdd, MVT RetVT, const Value *LHS,
204 unsigned emitAddSub_rr(bool UseAdd, MVT RetVT, unsigned LHSReg,
207 unsigned emitAddSub_ri(bool UseAdd, MVT RetVT, unsigned LHSReg,
210 unsigned emitAddSub_rs(bool UseAdd, MVT RetVT, unsigned LHSReg,
214 unsigned emitAddSub_rx(bool UseAdd, MVT RetVT, unsigned LHSReg,
222 bool emitICmp(MVT RetVT, const Value *LHS, const Value *RHS, bool IsZExt);
223 bool emitICmp_ri(MVT RetVT, unsigned LHSReg, uint64_t Imm);
224 bool emitFCmp(MVT RetVT, const Value *LHS, const Value *RHS);
233 unsigned emitAdd(MVT RetVT, const Value *LHS, const Value *RHS,
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H A DAArch64ISelLowering.cpp15731 const EVT RetVT = N->getValueType(0); in performGatherLoadCombine() local
15732 assert(RetVT.isScalableVector() && in performGatherLoadCombine()
15738 if (RetVT.getSizeInBits().getKnownMinSize() > AArch64::SVEBitsPerBlock) in performGatherLoadCombine()
15753 RetVT.getScalarSizeInBits()); in performGatherLoadCombine()
15775 RetVT.getScalarSizeInBits() / 8)) { in performGatherLoadCombine()
15801 EVT HwRetVt = getSVEContainerType(RetVT); in performGatherLoadCombine()
15806 SDValue OutVT = DAG.getValueType(RetVT); in performGatherLoadCombine()
15807 if (RetVT.isFloatingPoint()) in performGatherLoadCombine()
15818 if (RetVT.isInteger() && (RetVT != HwRetVt)) in performGatherLoadCombine()
15819 Load = DAG.getNode(ISD::TRUNCATE, DL, RetVT, Load.getValue(0)); in performGatherLoadCombine()
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/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DRuntimeLibcalls.h38 Libcall getFPEXT(EVT OpVT, EVT RetVT);
42 Libcall getFPROUND(EVT OpVT, EVT RetVT);
46 Libcall getFPTOSINT(EVT OpVT, EVT RetVT);
50 Libcall getFPTOUINT(EVT OpVT, EVT RetVT);
54 Libcall getSINTTOFP(EVT OpVT, EVT RetVT);
58 Libcall getUINTTOFP(EVT OpVT, EVT RetVT);
H A DFastISel.h346 virtual unsigned fastEmit_(MVT VT, MVT RetVT, unsigned Opcode);
350 virtual unsigned fastEmit_r(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0);
354 virtual unsigned fastEmit_rr(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0,
360 virtual unsigned fastEmit_ri(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0,
373 virtual unsigned fastEmit_i(MVT VT, MVT RetVT, unsigned Opcode, uint64_t Imm);
378 virtual unsigned fastEmit_f(MVT VT, MVT RetVT, unsigned Opcode,
434 Register fastEmitInst_extractsubreg(MVT RetVT, unsigned Op0, uint32_t Idx);
H A DTargetLowering.h3243 EVT RetVT, ArrayRef<SDValue> Ops,
3896 MakeLibCallOptions &setTypeListBeforeSoften(ArrayRef<EVT> OpsVT, EVT RetVT,
3899 RetVTBeforeSoften = RetVT;
/netbsd-src/external/apache2/llvm/dist/llvm/utils/TableGen/
H A DFastISelEmitter.cpp518 MVT::SimpleValueType RetVT = MVT::isVoid; in collectPatterns() local
519 if (InstPatNode->getNumTypes()) RetVT = InstPatNode->getSimpleType(0); in collectPatterns()
520 MVT::SimpleValueType VT = RetVT; in collectPatterns()
592 [RetVT].count(PredicateCheck)) { in collectPatterns()
596 SimplePatternsCheck[Operands][OpcodeName][VT][RetVT].insert( in collectPatterns()
601 SimplePatterns[Operands][OpcodeName][VT][RetVT].emplace(complexity, in collectPatterns()
711 MVT::SimpleValueType RetVT = RI.first; in printFunctionDefinitions() local
716 << getLegalCName(std::string(getName(RetVT))) << "_"; in printFunctionDefinitions()
722 emitInstructionCode(OS, Operands, PM, std::string(getName(RetVT))); in printFunctionDefinitions()
735 MVT::SimpleValueType RetVT = RI.first; in printFunctionDefinitions() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
H A DPPCFastISel.cpp192 bool finishCall(MVT RetVT, CallLoweringInfo &CLI, unsigned &NumBytes);
1488 bool PPCFastISel::finishCall(MVT RetVT, CallLoweringInfo &CLI, unsigned &NumBytes) { in finishCall() argument
1499 if (RetVT != MVT::isVoid) { in finishCall()
1502 CCInfo.AnalyzeCallResult(RetVT, RetCC_PPC64_ELF_FIS); in finishCall()
1512 if (RetVT == MVT::i8 || RetVT == MVT::i16 || RetVT == MVT::i32) in finishCall()
1518 if (RetVT == CopyVT) { in finishCall()
1524 ResultReg = createResultReg(TLI.getRegClassFor(RetVT)); in finishCall()
1532 } else if (RetVT == MVT::i8 || RetVT == MVT::i16 || RetVT == MVT::i32) { in finishCall()
1572 MVT RetVT; in fastLowerCall() local
1574 RetVT = MVT::isVoid; in fastLowerCall()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
H A DARMFastISel.cpp226 bool FinishCall(MVT RetVT, SmallVectorImpl<Register> &UsedRegs,
2017 bool ARMFastISel::FinishCall(MVT RetVT, SmallVectorImpl<Register> &UsedRegs, in FinishCall() argument
2027 if (RetVT != MVT::isVoid) { in FinishCall()
2030 CCInfo.AnalyzeCallResult(RetVT, CCAssignFnForCall(CC, true, isVarArg)); in FinishCall()
2033 if (RVLocs.size() == 2 && RetVT == MVT::f64) { in FinishCall()
2054 if (RetVT == MVT::i1 || RetVT == MVT::i8 || RetVT == MVT::i16) in FinishCall()
2202 MVT RetVT; in ARMEmitLibcall() local
2204 RetVT = MVT::isVoid; in ARMEmitLibcall()
2205 else if (!isTypeLegal(RetTy, RetVT)) in ARMEmitLibcall()
2209 if (RetVT != MVT::isVoid && RetVT != MVT::i32) { in ARMEmitLibcall()
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H A DARMISelLowering.cpp3029 auto RetVT = Outs[realRVLocIdx].ArgVT; in LowerReturn() local
3030 if (AFI->isCmseNSEntryFunction() && (RetVT == MVT::f16)) { in LowerReturn()
3035 auto MaskValue = APInt::getLowBitsSet(LocBits, RetVT.getSizeInBits()); in LowerReturn()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86FastISel.cpp119 bool X86FastEmitCMoveSelect(MVT RetVT, const Instruction *I);
121 bool X86FastEmitSSESelect(MVT RetVT, const Instruction *I);
123 bool X86FastEmitPseudoSelect(MVT RetVT, const Instruction *I);
244 MVT RetVT; in foldX86XALUIntrinsic() local
248 if (!isTypeLegal(RetTy, RetVT)) in foldX86XALUIntrinsic()
251 if (RetVT != MVT::i32 && RetVT != MVT::i64) in foldX86XALUIntrinsic()
2033 bool X86FastISel::X86FastEmitCMoveSelect(MVT RetVT, const Instruction *I) { in X86FastEmitCMoveSelect() argument
2039 if (RetVT < MVT::i16 || RetVT > MVT::i64) in X86FastEmitCMoveSelect()
2043 const TargetRegisterClass *RC = TLI.getRegClassFor(RetVT); in X86FastEmitCMoveSelect()
2158 bool X86FastISel::X86FastEmitSSESelect(MVT RetVT, const Instruction *I) { in X86FastEmitSSESelect() argument
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
H A DMipsFastISel.cpp201 unsigned emitLogicalOp(unsigned ISDOpc, MVT RetVT, const Value *LHS,
246 bool finishCall(CallLoweringInfo &CLI, MVT RetVT, unsigned NumBytes);
295 unsigned MipsFastISel::emitLogicalOp(unsigned ISDOpc, MVT RetVT, in emitLogicalOp() argument
1276 bool MipsFastISel::finishCall(CallLoweringInfo &CLI, MVT RetVT, in finishCall() argument
1280 if (RetVT != MVT::isVoid) { in finishCall()
1294 if (RetVT == MVT::i1 || RetVT == MVT::i8 || RetVT == MVT::i16) in finishCall()
1512 MVT RetVT; in fastLowerCall() local
1514 RetVT = MVT::isVoid; in fastLowerCall()
1515 else if (!isTypeSupported(CLI.RetTy, RetVT)) in fastLowerCall()
1583 return finishCall(CLI, RetVT, NumBytes); in fastLowerCall()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeDAG.cpp1995 EVT RetVT = Node->getValueType(0); in ExpandLibCall() local
1996 Type *RetTy = RetVT.getTypeForEVT(*DAG.getContext()); in ExpandLibCall()
2015 bool signExtend = TLI.shouldSignExtendTypeInLibCall(RetVT, isSigned); in ExpandLibCall()
2055 EVT RetVT = Node->getValueType(0); in ExpandFPLibCall() local
2059 std::pair<SDValue, SDValue> Tmp = TLI.makeLibCall(DAG, LC, RetVT, in ExpandFPLibCall()
2111 EVT RetVT = Node->getValueType(0); in ExpandArgFPLibCall() local
2115 std::pair<SDValue, SDValue> Tmp = TLI.makeLibCall(DAG, LC, RetVT, in ExpandArgFPLibCall()
2149 EVT RetVT = Node->getValueType(0); in ExpandDivRemLibCall() local
2150 Type *RetTy = RetVT.getTypeForEVT(*DAG.getContext()); in ExpandDivRemLibCall()
2165 SDValue FIPtr = DAG.CreateStackTemporary(RetVT); in ExpandDivRemLibCall()
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H A DLegalizeFloatTypes.cpp919 static RTLIB::Libcall findFPToIntLibcall(EVT SrcVT, EVT RetVT, EVT &Promoted, in findFPToIntLibcall() argument
927 if (Promoted.bitsGE(RetVT)) in findFPToIntLibcall()
1992 EVT RetVT = N->getOperand(0).getValueType(); in ExpandFloatOp_LROUND() local
1994 return TLI.makeLibCall(DAG, GetFPLibCall(RetVT, in ExpandFloatOp_LROUND()
2005 EVT RetVT = N->getOperand(0).getValueType(); in ExpandFloatOp_LLROUND() local
2007 return TLI.makeLibCall(DAG, GetFPLibCall(RetVT, in ExpandFloatOp_LLROUND()
2018 EVT RetVT = N->getOperand(0).getValueType(); in ExpandFloatOp_LRINT() local
2020 return TLI.makeLibCall(DAG, GetFPLibCall(RetVT, in ExpandFloatOp_LRINT()
2031 EVT RetVT = N->getOperand(0).getValueType(); in ExpandFloatOp_LLRINT() local
2033 return TLI.makeLibCall(DAG, GetFPLibCall(RetVT, in ExpandFloatOp_LLRINT()
[all …]
H A DTargetLowering.cpp148 TargetLowering::makeLibCall(SelectionDAG &DAG, RTLIB::Libcall LC, EVT RetVT, in makeLibCall() argument
180 Type *RetTy = RetVT.getTypeForEVT(*DAG.getContext()); in makeLibCall()
182 bool signExtend = shouldSignExtendTypeInLibCall(RetVT, CallOptions.IsSExt); in makeLibCall()
405 EVT RetVT = getCmpLibcallReturnType(); in softenSetCCOperands() local
410 CallOptions.setTypeListBeforeSoften(OpsVT, RetVT, true); in softenSetCCOperands()
411 auto Call = makeLibCall(DAG, LC1, RetVT, Ops, CallOptions, dl, Chain); in softenSetCCOperands()
413 NewRHS = DAG.getConstant(0, dl, RetVT); in softenSetCCOperands()
417 assert(RetVT.isInteger()); in softenSetCCOperands()
418 CCCode = getSetCCInverse(CCCode, RetVT); in softenSetCCOperands()
426 getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), RetVT); in softenSetCCOperands()
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H A DFastISel.cpp2100 Register FastISel::fastEmitInst_extractsubreg(MVT RetVT, unsigned Op0, in fastEmitInst_extractsubreg() argument
2102 Register ResultReg = createResultReg(TLI.getRegClassFor(RetVT)); in fastEmitInst_extractsubreg()
H A DLegalizeVectorTypes.cpp5150 EVT RetVT = WidenEltVT; in FindMemType() local
5152 return RetVT; in FindMemType()
5174 RetVT = MemVT; in FindMemType()
5197 if (RetVT.getFixedSizeInBits() < MemVTWidth || MemVT == WidenVT) in FindMemType()
5205 return RetVT; in FindMemType()
H A DLegalizeIntegerTypes.cpp2232 EVT RetVT = Node->getValueType(0); in ExpandAtomic() local
2244 return TLI.makeLibCall(DAG, LC, RetVT, Ops, CallOptions, SDLoc(Node), in ExpandAtomic()
3141 EVT RetVT = N->getValueType(0); in ExpandIntRes_LLROUND_LLRINT() local
3146 std::pair<SDValue, SDValue> Tmp = TLI.makeLibCall(DAG, LC, RetVT, in ExpandIntRes_LLROUND_LLRINT()
H A DSelectionDAGBuilder.cpp6251 EVT RetVT = TLI.getValueType(DAG.getDataLayout(), I.getType()); in visitIntrinsicCall() local
6252 setValue(&I, DAG.getNode(Opcode, sdl, RetVT, in visitIntrinsicCall()
9366 EVT RetVT = OldRetTys[i]; in LowerCallTo() local
9368 MVT RegisterVT = getRegisterType(CLI.RetTy->getContext(), RetVT); in LowerCallTo()
9369 unsigned NumRegs = getNumRegisters(CLI.RetTy->getContext(), RetVT); in LowerCallTo()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/
H A DWebAssemblyFastISel.cpp1155 EVT RetVT = TLI.getValueType(DL, I->getType()); in selectBitCast() local
1156 if (!VT.isSimple() || !RetVT.isSimple()) in selectBitCast()
1163 if (VT == RetVT) { in selectBitCast()
1169 Register Reg = fastEmit_ISD_BITCAST_r(VT.getSimpleVT(), RetVT.getSimpleVT(), in selectBitCast()