Home
last modified time | relevance | path

Searched refs:RegType (Results 1 – 5 of 5) sorted by relevance

/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64InstrFormats.td5637 string kind2, RegisterOperand RegType,
5640 BaseSIMDThreeSameVectorTied<Q, U, 0b100, {0b1001, Mixed}, RegType, asm, kind1,
5641 [(set (AccumType RegType:$dst),
5642 (OpNode (AccumType RegType:$Rd),
5643 (InputType RegType:$Rn),
5644 (InputType RegType:$Rm)))]> {
5659 string kind2, RegisterOperand RegType,
5662 BaseSIMDThreeSameVectorTied<Q, U, size, 0b11101, RegType, asm, kind1,
5663 [(set (AccumType RegType:$dst),
5664 (OpNode (AccumType RegType:$Rd),
[all …]
H A DAArch64FrameLowering.cpp2216 enum RegType { GPR, FPR64, FPR128, PPR, ZPR } Type; enum
H A DAArch64InstrInfo.td891 string rhs_kind, RegisterOperand RegType,
894 lhs_kind, rhs_kind, RegType, AccumType,
896 let Pattern = [(set (AccumType RegType:$dst),
897 (AccumType (int_aarch64_neon_usdot (AccumType RegType:$Rd),
901 (InputType RegType:$Rn))))];
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DCodeGenPrepare.cpp6977 MVT RegType = TLI->getRegisterType(Context, TLI->getValueType(*DL, OldType)); in optimizeSwitchInst() local
6978 unsigned RegWidth = RegType.getSizeInBits(); in optimizeSwitchInst()
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/Target/
H A DTarget.td223 // RegType - Specify the list ValueType of the registers in this register