| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | PeepholeOptimizer.cpp | 101 using RegSubRegPair = TargetInstrInfo::RegSubRegPair; typedef
187 using RewriteMapTy = SmallDenseMap<RegSubRegPair, ValueTrackerResult>;
203 bool findNextSource(RegSubRegPair RegSubReg, RewriteMapTy &RewriteMap);
222 DenseMap<RegSubRegPair, MachineInstr *> &CopyMIs);
258 RegSubRegPair Def, RewriteMapTy &RewriteMap);
289 SmallVector<RegSubRegPair, 2> RegSrcs;
312 RegSrcs.push_back(RegSubRegPair(SrcReg, SrcSubReg)); in addSource()
317 RegSrcs[Idx] = RegSubRegPair(SrcReg, SrcSubReg); in setSource()
322 RegSubRegPair getSrc(int Idx) const { in getSrc()
665 bool PeepholeOptimizer::findNextSource(RegSubRegPair RegSubReg, in findNextSource()
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| H A D | TailDuplicator.cpp | 349 DenseMap<Register, RegSubRegPair> &LocalVRMap, in processPHI()
350 SmallVectorImpl<std::pair<Register, RegSubRegPair>> &Copies, in processPHI()
358 LocalVRMap.insert(std::make_pair(DefReg, RegSubRegPair(SrcReg, SrcSubReg))); in processPHI()
363 Copies.push_back(std::make_pair(NewDef, RegSubRegPair(SrcReg, SrcSubReg))); in processPHI()
381 DenseMap<Register, RegSubRegPair> &LocalVRMap, in duplicateInstruction()
403 LocalVRMap.insert(std::make_pair(Reg, RegSubRegPair(NewReg, 0))); in duplicateInstruction()
450 LocalVRMap.insert(std::make_pair(Reg, RegSubRegPair(NewReg, 0))); in duplicateInstruction()
876 DenseMap<Register, RegSubRegPair> LocalVRMap; in tailDuplicate()
877 SmallVector<std::pair<Register, RegSubRegPair>, 4> CopyInfos; in tailDuplicate()
936 DenseMap<Register, RegSubRegPair> LocalVRMap; in tailDuplicate()
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| H A D | TargetInstrInfo.cpp | 1337 RegSubRegPair &BaseReg, RegSubRegPairAndIdx &InsertedReg) const { in getInsertSubregInputs()
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | TailDuplicator.h | 99 using RegSubRegPair = TargetInstrInfo::RegSubRegPair;
105 DenseMap<Register, RegSubRegPair> &LocalVRMap,
106 SmallVectorImpl<std::pair<Register, RegSubRegPair>> &Copies,
110 DenseMap<Register, RegSubRegPair> &LocalVRMap,
127 SmallVectorImpl<std::pair<Register, RegSubRegPair>> &CopyInfos,
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| H A D | TargetInstrInfo.h | 464 struct RegSubRegPair { struct
468 RegSubRegPair(Register Reg = Register(), unsigned SubReg = 0) argument
471 bool operator==(const RegSubRegPair& P) const { argument
474 bool operator!=(const RegSubRegPair& P) const {
482 struct RegSubRegPairAndIdx : RegSubRegPair {
487 : RegSubRegPair(Reg, SubReg), SubIdx(SubIdx) {} in RegSubRegPair() function
548 RegSubRegPair &BaseReg,
1252 RegSubRegPair &BaseReg, in getInsertSubregLikeInputs()
1986 template <> struct DenseMapInfo<TargetInstrInfo::RegSubRegPair> {
1989 static inline TargetInstrInfo::RegSubRegPair getEmptyKey() {
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | GCNDPPCombine.cpp | 59 using RegSubRegPair = TargetInstrInfo::RegSubRegPair; typedef in __anon5e250bb70111::GCNDPPCombine
64 RegSubRegPair CombOldVGPR,
69 RegSubRegPair CombOldVGPR, bool CombBCZ,
182 RegSubRegPair CombOldVGPR, in createDPPInst()
348 MachineInstr &OrigMI, MachineInstr &MovMI, RegSubRegPair CombOldVGPR, in createDPPInst()
482 CombOldVGPR = RegSubRegPair( in combineDPPMov()
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| H A D | SIInstrInfo.h | 1124 inline bool isOfRegClass(const TargetInstrInfo::RegSubRegPair &P, in isOfRegClass()
1136 TargetInstrInfo::RegSubRegPair getRegSubRegPair(const MachineOperand &O) { in getRegSubRegPair()
1138 return TargetInstrInfo::RegSubRegPair(O.getReg(), O.getSubReg()); in getRegSubRegPair()
1142 TargetInstrInfo::RegSubRegPair getRegSequenceSubReg(MachineInstr &MI,
1148 MachineInstr *getVRegSubRegDef(const TargetInstrInfo::RegSubRegPair &P,
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| H A D | SIShrinkInstructions.cpp | 420 static TargetInstrInfo::RegSubRegPair
430 return TargetInstrInfo::RegSubRegPair(Reg, Sub); in getSubRegForIndex()
556 TargetInstrInfo::RegSubRegPair X1, Y1; in matchSwap()
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| H A D | SIFoldOperands.cpp | 766 DenseMap<TargetInstrInfo::RegSubRegPair, Register> VGPRCopies; in foldOperand()
767 SmallSetVector<TargetInstrInfo::RegSubRegPair, 32> SeenAGPRs; in foldOperand()
770 TargetInstrInfo::RegSubRegPair CopyToVGPR; in foldOperand()
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| H A D | SIInstrInfo.cpp | 4645 SmallDenseSet<RegSubRegPair> SGPRsUsed; in isOperandLegal()
4647 SGPRsUsed.insert(RegSubRegPair(MO->getReg(), MO->getSubReg())); in isOperandLegal()
4654 RegSubRegPair SGPR(Op.getReg(), Op.getSubReg()); in isOperandLegal()
7576 TargetInstrInfo::RegSubRegPair getRegOrUndef(const MachineOperand &RegOpnd) { in getRegOrUndef()
7578 return RegOpnd.isUndef() ? TargetInstrInfo::RegSubRegPair() : in getRegOrUndef()
7582 TargetInstrInfo::RegSubRegPair
7590 return TargetInstrInfo::RegSubRegPair(); in getRegSequenceSubReg()
7596 TargetInstrInfo::RegSubRegPair &RSR) { in followSubRegDef()
7620 MachineInstr *llvm::getVRegSubRegDef(const TargetInstrInfo::RegSubRegPair &P, in getVRegSubRegDef()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.h | 91 RegSubRegPair &BaseReg,
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| H A D | ARMBaseInstrInfo.cpp | 5387 const MachineInstr &MI, unsigned DefIdx, RegSubRegPair &BaseReg, in getInsertSubregLikeInputs()
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