Searched refs:RegSizeInfo (Results 1 – 4 of 4) sorted by relevance
148 struct RegSizeInfo { struct153 RegSizeInfo(Record *R, const CodeGenHwModes &CGH); argument154 RegSizeInfo() = default;155 bool operator< (const RegSizeInfo &I) const;156 bool operator== (const RegSizeInfo &I) const {160 bool operator!= (const RegSizeInfo &I) const {164 bool isSubClassOf(const RegSizeInfo &I) const;168 struct RegSizeInfoByHwMode : public InfoByHwMode<RegSizeInfo> {182 void insertRegSizeForMode(unsigned Mode, RegSizeInfo Info) { in insertRegSizeForMode()188 raw_ostream &operator<<(raw_ostream &OS, const RegSizeInfo &T);
119 RegSizeInfo::RegSizeInfo(Record *R, const CodeGenHwModes &CGH) { in RegSizeInfo() function in RegSizeInfo125 bool RegSizeInfo::operator< (const RegSizeInfo &I) const { in operator <()130 bool RegSizeInfo::isSubClassOf(const RegSizeInfo &I) const { in isSubClassOf()136 void RegSizeInfo::writeToStream(raw_ostream &OS) const { in writeToStream()145 auto I = Map.insert({P.first, RegSizeInfo(P.second, CGH)}); in RegSizeInfoByHwMode()169 const RegSizeInfo &A0 = get(M0); in hasStricterSpillThan()170 const RegSizeInfo &B0 = I.get(M0); in hasStricterSpillThan()206 raw_ostream &operator<<(raw_ostream &OS, const RegSizeInfo &T) { in operator <<()
1288 const RegSizeInfo &RI = RC.RSI.get(M); in runTargetDesc()
791 RegSizeInfo RI; in CodeGenRegisterClass()