Searched refs:RegBitWidth (Results 1 – 4 of 4) sorted by relevance
15 static unsigned getLoadImmediateOpcode(unsigned RegBitWidth) { in getLoadImmediateOpcode() argument16 switch (RegBitWidth) { in getLoadImmediateOpcode()26 static MCInst loadImmediate(unsigned Reg, unsigned RegBitWidth, in loadImmediate() argument28 if (Value.getBitWidth() > RegBitWidth) in loadImmediate()30 return MCInstBuilder(getLoadImmediateOpcode(RegBitWidth)) in loadImmediate()
43 static unsigned getLoadImmediateOpcode(unsigned RegBitWidth) { in getLoadImmediateOpcode() argument44 switch (RegBitWidth) { in getLoadImmediateOpcode()54 static MCInst loadImmediate(unsigned Reg, unsigned RegBitWidth, in loadImmediate() argument56 if (Value.getBitWidth() > RegBitWidth) in loadImmediate()61 return MCInstBuilder(getLoadImmediateOpcode(RegBitWidth)) in loadImmediate()
431 static unsigned getLoadImmediateOpcode(unsigned RegBitWidth) { in getLoadImmediateOpcode() argument432 switch (RegBitWidth) { in getLoadImmediateOpcode()446 static MCInst loadImmediate(unsigned Reg, unsigned RegBitWidth, in loadImmediate() argument448 if (Value.getBitWidth() > RegBitWidth) in loadImmediate()450 return MCInstBuilder(getLoadImmediateOpcode(RegBitWidth)) in loadImmediate()503 std::vector<MCInst> loadAndFinalize(unsigned Reg, unsigned RegBitWidth,531 unsigned RegBitWidth, in loadAndFinalize() argument533 assert((RegBitWidth & 7) == 0 && "RegBitWidth must be a multiple of 8 bits"); in loadAndFinalize()534 initStack(RegBitWidth / 8); in loadAndFinalize()536 add(releaseStackSpace(RegBitWidth / 8)); in loadAndFinalize()
2223 const unsigned RegBitWidth = AMDGPU::getRegBitWidth(*RC->MC); in getRegSplitParts() local2224 assert(RegBitWidth >= 32 && RegBitWidth <= 1024); in getRegSplitParts()2226 const unsigned RegDWORDs = RegBitWidth / 32; in getRegSplitParts()