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Searched refs:RREG32_SOC15_OFFSET (Results 1 – 6 of 6) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_mmhub_v9_4.c173 tmp = RREG32_SOC15_OFFSET( in mmhub_v9_4_init_system_aperture_regs()
190 tmp = RREG32_SOC15_OFFSET(MMHUB, 0, in mmhub_v9_4_init_tlb_regs()
218 tmp = RREG32_SOC15_OFFSET(MMHUB, 0, mmVML2PF0_VM_L2_CNTL, in mmhub_v9_4_init_cache_regs()
236 tmp = RREG32_SOC15_OFFSET(MMHUB, 0, mmVML2PF0_VM_L2_CNTL2, in mmhub_v9_4_init_cache_regs()
272 tmp = RREG32_SOC15_OFFSET(MMHUB, 0, mmVML2VC0_VM_CONTEXT0_CNTL, in mmhub_v9_4_enable_system_domain()
313 tmp = RREG32_SOC15_OFFSET(MMHUB, 0, mmVML2VC0_VM_CONTEXT1_CNTL, in mmhub_v9_4_setup_vmid_config()
415 tmp = RREG32_SOC15_OFFSET(MMHUB, 0, in mmhub_v9_4_gart_disable()
428 tmp = RREG32_SOC15_OFFSET(MMHUB, 0, mmVML2PF0_VM_L2_CNTL, in mmhub_v9_4_gart_disable()
451 tmp = RREG32_SOC15_OFFSET(MMHUB, 0, in mmhub_v9_4_set_fault_enable_default()
553 def = data = RREG32_SOC15_OFFSET(MMHUB, 0, in mmhub_v9_4_update_medium_grain_clock_gating()
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H A Dsoc15_common.h40 #define RREG32_SOC15_OFFSET(ip, inst, reg, offset) \ macro
H A Damdgpu_gfxhub_v2_0.c215 tmp = RREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_CNTL, i); in gfxhub_v2_0_setup_vmid_config()
H A Damdgpu_gfxhub_v1_0.c227 tmp = RREG32_SOC15_OFFSET(GC, 0, mmVM_CONTEXT1_CNTL, i); in gfxhub_v1_0_setup_vmid_config()
H A Damdgpu_mmhub_v2_0.c205 tmp = RREG32_SOC15_OFFSET(MMHUB, 0, mmMMVM_CONTEXT1_CNTL, i); in mmhub_v2_0_setup_vmid_config()
H A Damdgpu_mmhub_v1_0.c250 tmp = RREG32_SOC15_OFFSET(MMHUB, 0, mmVM_CONTEXT1_CNTL, i); in mmhub_v1_0_setup_vmid_config()