Home
last modified time | relevance | path

Searched refs:RO (Results 1 – 25 of 104) sorted by relevance

12345

/netbsd-src/external/bsd/ntp/dist/libparse/
H A Dinfo_trimble.c58 { CMD_RDATAA, "CMD_RDATAA", "data channel A configuration (0x3D)", "trimble_channelA", RO },
59 { CMD_RALMANAC, "CMD_RALMANAC", "almanac data for sat (0x40)", "gps_almanac", RO },
60 { CMD_RCURTIME, "CMD_RCURTIME", "GPS time (0x41)", "gps_time", RO },
61 …{ CMD_RSPOSXYZ, "CMD_RSPOSXYZ", "single precision XYZ position (0x42)", "gps_position(XYZ)", RO|DE…
62 { CMD_RVELOXYZ, "CMD_RVELOXYZ", "velocity fix (XYZ ECEF) (0x43)", "gps_velocity(XYZ)", RO|DEF },
63 { CMD_RBEST4, "CMD_RBEST4", "best 4 satellite selection (0x44)", "trimble_best4", RO|DEF },
64 { CMD_RVERSION, "CMD_RVERSION", "software version (0x45)", "trimble_version", RO|DEF },
65 …{ CMD_RRECVHEALTH, "CMD_RRECVHEALTH", "receiver health (0x46)", "trimble_receiver_health", RO|DEF …
66 …SIGNALLV, "CMD_RSIGNALLV", "signal levels of all satellites (0x47)", "trimble_signal_levels", RO },
67 { CMD_RMESSAGE, "CMD_RMESSAGE", "GPS system message (0x48)", "gps-message", RO|DEF },
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
H A DMicroMipsInstrInfo.td199 RegisterOperand RO> :
200 InstSE<(outs), (ins RO:$rs, opnd:$offset),
209 class LoadLeftRightMM<string opstr, SDNode OpNode, RegisterOperand RO,
211 InstSE<(outs RO:$rt), (ins MemOpnd:$addr, RO:$src),
213 [(set RO:$rt, (OpNode addrimm12:$addr, RO:$src))],
222 class StoreLeftRightMM<string opstr, SDNode OpNode, RegisterOperand RO,
224 InstSE<(outs), (ins RO:$rt, MemOpnd:$addr),
226 [(OpNode RO:$rt, addrimm12:$addr)], Itin, FrmI> {
259 class LLBaseMM<string opstr, RegisterOperand RO> :
260 InstSE<(outs RO:$rt), (ins mem_mm_12:$addr),
[all …]
H A DMipsInstrInfo.td1313 class ArithLogicR<string opstr, RegisterOperand RO, bit isComm = 0,
1316 InstSE<(outs RO:$rd), (ins RO:$rs, RO:$rt),
1318 [(set RO:$rd, (OpNode RO:$rs, RO:$rt))], Itin, FrmR, opstr> {
1325 class ArithLogicI<string opstr, Operand Od, RegisterOperand RO,
1329 InstSE<(outs RO:$rt), (ins RO:$rs, Od:$imm16),
1331 [(set RO:$rt, (OpNode RO:$rs, imm_type:$imm16))],
1347 class LogicNOR<string opstr, RegisterOperand RO>:
1348 InstSE<(outs RO:$rd), (ins RO:$rs, RO:$rt),
1350 [(set RO:$rd, (not (or RO:$rs, RO:$rt)))], II_NOR, FrmR, opstr> {
1356 RegisterOperand RO, InstrItinClass itin,
[all …]
H A DMicroMipsDSPInstrInfo.td217 RegisterOperand RO, Operand ImmOpnd> {
218 dag OutOperandList = (outs RO:$rt);
219 dag InOperandList = (ins RO:$rs, ImmOpnd:$sa);
221 list<dag> Pattern = [(set RO:$rt, (OpNode RO:$rs, ImmPat:$sa))];
253 InstrItinClass itin, RegisterOperand RO> {
254 dag OutOperandList = (outs RO:$rd);
255 dag InOperandList = (ins RO:$rt, GPR32Opnd:$rs);
257 list<dag> Pattern = [(set RO:$rd, (OpNode RO:$rt, GPR32Opnd:$rs))];
336 class MFHI_MM_DESC_BASE<string instr_asm, RegisterOperand RO, SDNode OpNode,
339 dag InOperandList = (ins RO:$ac);
[all …]
H A DMipsDSPInstrInfo.td335 RegisterOperand RO> {
336 dag OutOperandList = (outs RO:$rd);
339 list<dag> Pattern = [(set RO:$rd, (OpNode immPat:$imm))];
345 InstrItinClass itin, RegisterOperand RO> {
346 dag OutOperandList = (outs RO:$rd);
347 dag InOperandList = (ins RO:$rt, GPR32Opnd:$rs_sa);
349 list<dag> Pattern = [(set RO:$rd, (OpNode RO:$rt, GPR32Opnd:$rs_sa))];
356 RegisterOperand RO, Operand ImmOpnd> {
357 dag OutOperandList = (outs RO:$rd);
358 dag InOperandList = (ins RO:$rt, ImmOpnd:$rs_sa);
[all …]
H A DMips64InstrInfo.td455 class Count1s<string opstr, RegisterOperand RO>:
456 InstSE<(outs RO:$rd), (ins RO:$rs), !strconcat(opstr, "\t$rd, $rs"),
457 [(set RO:$rd, (ctpop RO:$rs))], II_POP, FrmR, opstr> {
461 class ExtsCins<string opstr, InstrItinClass itin, RegisterOperand RO,
463 InstSE<(outs RO:$rt), (ins RO:$rs, uimm5:$pos, uimm5:$lenm1),
465 [(set RO:$rt, (Op RO:$rs, PosImm:$pos, imm:$lenm1))],
489 RegisterOperand RO, Operand ImmOp, bits<64> shift = 1> :
490 InstSE<(outs), (ins RO:$rs, ImmOp:$p, opnd:$offset),
492 [(brcond (i32 (cond_op (and RO:$rs, (shl shift, immZExt5_64:$p)), 0)),
500 class MFC2OP<string asmstr, RegisterOperand RO, InstrItinClass itin> :
[all …]
/netbsd-src/sys/dev/microcode/aic7xxx/
H A Daic79xx.reg225 access_mode RO
299 access_mode RO
442 access_mode RO
467 access_mode RO
648 access_mode RO
659 access_mode RO
670 access_mode RO
696 access_mode RO
706 access_mode RO
716 access_mode RO
[all …]
H A Daic7xxx.reg108 access_mode RO
281 access_mode RO
314 access_mode RO
330 access_mode RO
346 access_mode RO
423 access_mode RO
633 access_mode RO
639 access_mode RO
651 access_mode RO
658 access_mode RO
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DCFIInstrInserter.cpp365 CSRSavedLocation RO = it->second; in insertCFIInstrs() local
366 if (!RO.Reg && RO.Offset) { in insertCFIInstrs()
368 MCCFIInstruction::createOffset(nullptr, Reg, *RO.Offset)); in insertCFIInstrs()
369 } else if (RO.Reg && !RO.Offset) { in insertCFIInstrs()
371 MCCFIInstruction::createRegister(nullptr, Reg, *RO.Reg)); in insertCFIInstrs()
/netbsd-src/external/bsd/cron/dist/
H A DMAIL12 Status: RO
30 Status: RO
56 Status: RO
85 Status: RO
97 Status: RO
111 Status: RO
130 Status: RO
159 Status: RO
207 Status: RO
231 Status: RO
[all …]
/netbsd-src/external/bsd/pcc/dist/pcc/cc/cxxcom/
H A Doptim.c41 # define RO(p) p->n_right->n_op macro
181 if (RO(p) == ICON) { in optim()
223 if (RO(p) == ICON) { in optim()
289 if( RO(p) == o ){ in optim()
397 if (RO(p) != NE) in optim()
/netbsd-src/external/gpl3/binutils/dist/ld/scripttempl/
H A Dalphavms.sc34 /* RO, executable code. */
38 /* RO initialized data. */
H A Dia64vms.sc48 /* RO segment. */
51 /* RO initialized data. */
/netbsd-src/external/gpl3/binutils.old/dist/ld/scripttempl/
H A Dalphavms.sc34 /* RO, executable code. */
38 /* RO initialized data. */
H A Dia64vms.sc48 /* RO segment. */
51 /* RO initialized data. */
/netbsd-src/external/bsd/pcc/dist/pcc/cc/ccom/
H A Doptim.c45 # define RO(p) p->n_right->n_op macro
185 if (RO(p) == ICON) { in optim()
225 if (RO(p) == ICON) { in optim()
303 if( RO(p) == o ){ in optim()
443 if (RO(p) != NE) in optim()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonEarlyIfConv.cpp820 const MachineOperand &RO = PN->getOperand(i), &BO = PN->getOperand(i+1); in updatePhiNodes() local
822 SR = RO.getReg(), SSR = RO.getSubReg(); in updatePhiNodes()
824 TR = RO.getReg(), TSR = RO.getSubReg(); in updatePhiNodes()
826 FR = RO.getReg(), FSR = RO.getSubReg(); in updatePhiNodes()
H A DHexagonGenInsert.cpp387 OrderedRegisterList(const RegisterOrdering &RO) in OrderedRegisterList() argument
388 : MaxSize(MaxORLSize), Ord(RO) {} in OrderedRegisterList()
529 void buildOrderingMF(RegisterOrdering &RO) const;
530 void buildOrderingBT(RegisterOrdering &RB, RegisterOrdering &RO) const;
597 void HexagonGenInsert::buildOrderingMF(RegisterOrdering &RO) const { in buildOrderingMF()
617 RO.insert(std::make_pair(R, Index++)); in buildOrderingMF()
628 RegisterOrdering &RO) const { in buildOrderingBT()
642 RO.insert(std::make_pair(VRs[i], i)); in buildOrderingBT()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/MCTargetDesc/
H A DX86WinCOFFTargetStreamer.cpp351 for (RegSaveOffset RO : RegSaveOffsets) in emitFrameDataRecord() local
352 FuncOS << printFPOReg(MRI, RO.Reg) << ' ' << CFAVar << ' ' << RO.Offset in emitFrameDataRecord()
/netbsd-src/external/gpl3/gcc.old/dist/libphobos/src/std/
H A Dfile.d2457 version (StdDdoc) void symlink(RO, RL)(RO original, RL link) in attrIsFile()
2458 if ((isInputRange!RO && !isInfinite!RO && isSomeChar!(ElementEncodingType!RO) || in attrIsFile()
2459 isConvertibleToString!RO) && in attrIsFile()
2462 else version (Posix) void symlink(RO, RL)(RO original, RL link)
2463 if ((isInputRange!RO && !isInfinite!RO && isSomeChar!(ElementEncodingType!RO) ||
2464 isConvertibleToString!RO) &&
2468 static if (isConvertibleToString!RO || isConvertibleToString!RL)
2471 alias Types = staticMap!(convertToString, RO, RL);
/netbsd-src/external/apache2/llvm/dist/clang/lib/Sema/
H A DOpenCLBuiltins.td133 // Access qualifier. Must be one of ("RO", "WO", "RW").
319 // specifying an access qualifier (RO/WO/RW).
1218 …def : Builtin<"read_imagef", [VectorType<Float, 4>, ImageType<imgTy, "RO">, Sampler, coordTy], Att…
1219 …def : Builtin<"read_imagei", [VectorType<Int, 4>, ImageType<imgTy, "RO">, Sampler, coordTy], Attr.…
1220 …def : Builtin<"read_imageui", [VectorType<UInt, 4>, ImageType<imgTy, "RO">, Sampler, coordTy], Att…
1225 …def : Builtin<"read_imagef", [VectorType<Float, 4>, ImageType<imgTy, "RO">, Sampler, VectorType<co…
1226 …def : Builtin<"read_imagei", [VectorType<Int, 4>, ImageType<imgTy, "RO">, Sampler, VectorType<coor…
1227 …def : Builtin<"read_imageui", [VectorType<UInt, 4>, ImageType<imgTy, "RO">, Sampler, VectorType<co…
1232 …def : Builtin<"read_imagef", [VectorType<Float, 4>, ImageType<imgTy, "RO">, Sampler, VectorType<co…
1233 …def : Builtin<"read_imagei", [VectorType<Int, 4>, ImageType<imgTy, "RO">, Sampler, VectorType<coor…
[all …]
/netbsd-src/share/locale/
H A DMakefile.locale11 NO NZ PL PT RO RS RU SE SI SK \
88 TERRITORY_ro= RO
/netbsd-src/distrib/acorn32/stand/BtNetBSD/!BtNetBSD/
H A Dcheckro4035 REM with the bug in OS_Module 7 (RO 4.03 for the Castle Kinetic Card). If
/netbsd-src/external/apache2/llvm/dist/llvm/lib/MC/MCDisassembler/
H A DMCDisassembler.cpp53 SMC_PCASE(RO, 1) in getSMCPriority()
/netbsd-src/external/apache2/llvm/dist/llvm/utils/TableGen/
H A DAsmWriterEmitter.cpp894 const CodeGenInstAlias::ResultOperand &RO = CGA.ResultOperands[i]; in EmitPrintAliasInstruction() local
896 switch (RO.Kind) { in EmitPrintAliasInstruction()
898 const Record *Rec = RO.getRecord(); in EmitPrintAliasInstruction()
899 StringRef ROName = RO.getName(); in EmitPrintAliasInstruction()
982 MIOpNum += RO.getMINumOperands(); in EmitPrintAliasInstruction()

12345