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Searched refs:RLC_SERDES_WR_CTRL__BPM_ADDR_MASK (Results 1 – 8 of 8) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_gfx_v7_0.c3596 tmp2 = RLC_SERDES_WR_CTRL__BPM_ADDR_MASK | in gfx_v7_0_enable_cgcg()
3650 data = RLC_SERDES_WR_CTRL__BPM_ADDR_MASK | in gfx_v7_0_enable_mgcg()
3701 data = RLC_SERDES_WR_CTRL__BPM_ADDR_MASK | RLC_SERDES_WR_CTRL__MGCG_OVERRIDE_1_MASK; in gfx_v7_0_enable_mgcg()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h7270 #define RLC_SERDES_WR_CTRL__BPM_ADDR_MASK 0x000000ffL macro
H A Dgfx_7_2_sh_mask.h8021 #define RLC_SERDES_WR_CTRL__BPM_ADDR_MASK 0xff macro
H A Dgfx_8_1_sh_mask.h9483 #define RLC_SERDES_WR_CTRL__BPM_ADDR_MASK 0xff macro
H A Dgfx_8_0_sh_mask.h8941 #define RLC_SERDES_WR_CTRL__BPM_ADDR_MASK 0xff macro
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h23280 #define RLC_SERDES_WR_CTRL__BPM_ADDR_MASK … macro
H A Dgc_9_2_1_sh_mask.h24635 #define RLC_SERDES_WR_CTRL__BPM_ADDR_MASK … macro
H A Dgc_9_1_sh_mask.h24571 #define RLC_SERDES_WR_CTRL__BPM_ADDR_MASK … macro