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Searched refs:RLC_MGCG_CTRL__SE_CAC_MGCG_CLK_CNTL_MASK (Results 1 – 5 of 5) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
H A Dgfx_8_1_sh_mask.h9605 #define RLC_MGCG_CTRL__SE_CAC_MGCG_CLK_CNTL_MASK 0x10000 macro
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h22935 #define RLC_MGCG_CTRL__SE_CAC_MGCG_CLK_CNTL_MASK … macro
H A Dgc_9_2_1_sh_mask.h24237 #define RLC_MGCG_CTRL__SE_CAC_MGCG_CLK_CNTL_MASK … macro
H A Dgc_9_1_sh_mask.h24226 #define RLC_MGCG_CTRL__SE_CAC_MGCG_CLK_CNTL_MASK … macro
H A Dgc_10_1_0_sh_mask.h33266 #define RLC_MGCG_CTRL__SE_CAC_MGCG_CLK_CNTL_MASK … macro