Searched refs:RADEON_READ (Results 1 – 5 of 5) sorted by relevance
140 u32 irqs = RADEON_READ(RADEON_GEN_INT_STATUS); in radeon_acknowledge_irqs()151 disp_irq = RADEON_READ(R500_DISP_INTERRUPT_STATUS); in radeon_acknowledge_irqs()229 tmp = RADEON_READ(RADEON_AIC_CNTL) & in radeon_driver_irq_handler()237 tmp = RADEON_READ(RADEON_BUS_CNTL) & in radeon_driver_irq_handler()244 tmp = RADEON_READ(RADEON_MSI_REARM_EN) & in radeon_driver_irq_handler()279 if (RADEON_READ(RADEON_LAST_SWI_REG) >= swi_nr) in radeon_wait_irq()285 RADEON_READ(RADEON_LAST_SWI_REG) >= swi_nr); in radeon_wait_irq()308 return RADEON_READ(R500_D1CRTC_FRAME_COUNT); in radeon_get_vblank_counter()310 return RADEON_READ(R500_D2CRTC_FRAME_COUNT); in radeon_get_vblank_counter()313 return RADEON_READ(RADEON_CRTC_CRNT_FRAME); in radeon_get_vblank_counter()[all …]
65 ret = RADEON_READ(R520_MC_IND_DATA); in R500_READ_MCIND()74 ret = RADEON_READ(RS480_NB_MC_DATA); in RS480_READ_MCIND()83 ret = RADEON_READ(RS690_MC_DATA); in RS690_READ_MCIND()93 ret = RADEON_READ(RS600_MC_DATA); in RS600_READ_MCIND()111 return RADEON_READ(R700_MC_VM_FB_LOCATION); in radeon_read_fb_location()113 return RADEON_READ(R600_MC_VM_FB_LOCATION); in radeon_read_fb_location()124 return RADEON_READ(RADEON_MC_FB_LOCATION); in radeon_read_fb_location()208 return RADEON_READ(RADEON_CLOCK_CNTL_DATA); in RADEON_READ_PLL()214 return RADEON_READ(RADEON_PCIE_DATA); in RADEON_READ_PCIE()222 (unsigned int)RADEON_READ(RADEON_RBBM_STATUS)); in radeon_status()[all …]
84 slots = (RADEON_READ(R600_GRBM_STATUS) in r600_do_wait_for_fifo()87 slots = (RADEON_READ(R600_GRBM_STATUS) in r600_do_wait_for_fifo()94 RADEON_READ(R600_GRBM_STATUS), in r600_do_wait_for_fifo()95 RADEON_READ(R600_GRBM_STATUS2)); in r600_do_wait_for_fifo()113 if (!(RADEON_READ(R600_GRBM_STATUS) & R600_GUI_ACTIVE)) in r600_do_wait_for_idle()118 RADEON_READ(R600_GRBM_STATUS), in r600_do_wait_for_idle()119 RADEON_READ(R600_GRBM_STATUS2)); in r600_do_wait_for_idle()218 resp = RADEON_READ(R600_VM_CONTEXT0_REQUEST_RESPONSE); in r600_vm_flush_gart_range()342 RADEON_READ(R600_GRBM_SOFT_RESET); in r600_cp_load_microcode()496 RADEON_READ(R600_GRBM_SOFT_RESET); in r700_cp_load_microcode()[all …]
179 DRM_READ32( (dev_priv)->ring_rptr, 0 ) : RADEON_READ(RADEON_CP_RB_RPTR))183 DRM_READ32( (dev_priv)->ring_rptr, 0 ) : RADEON_READ(R600_CP_RB_RPTR))839 : RADEON_READ( RADEON_SCRATCH_REG0 + 4*(x) ) )843 : RADEON_READ( R600_SCRATCH_REG0 + 4*(x) ) )1862 #define RADEON_READ(reg) RADEON_READ_MM(dev_priv, reg) macro
2168 OUT_RING(RADEON_READ(RADEON_CRTC_OFFSET_CNTL) | in radeon_do_init_pageflip()2171 OUT_RING(RADEON_READ(RADEON_CRTC2_OFFSET_CNTL) | in radeon_do_init_pageflip()