Home
last modified time | relevance | path

Searched refs:PllRange (Results 1 – 4 of 4) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/
H A Damdgpu_vegam_smumgr.c740 sclk_setting->PllRange = dividers.ucSclkPllRange; in vegam_calculate_sclk_params()
756 sclk_setting->PllRange = i; in vegam_calculate_sclk_params()
762 ((clock << table->SclkFcwRangeTable[sclk_setting->PllRange].postdiv) / in vegam_calculate_sclk_params()
764 temp = clock << table->SclkFcwRangeTable[sclk_setting->PllRange].postdiv; in vegam_calculate_sclk_params()
772 ((pcc_target_freq << table->SclkFcwRangeTable[sclk_setting->PllRange].postdiv) / in vegam_calculate_sclk_params()
781 ((ss_target_freq << table->SclkFcwRangeTable[sclk_setting->PllRange].postdiv) / in vegam_calculate_sclk_params()
783 temp = ss_target_freq << table->SclkFcwRangeTable[sclk_setting->PllRange].postdiv; in vegam_calculate_sclk_params()
H A Damdgpu_polaris10_smumgr.c865 sclk_setting->PllRange = dividers.ucSclkPllRange; in polaris10_calculate_sclk_params()
881 sclk_setting->PllRange = i; in polaris10_calculate_sclk_params()
886 …sclk_setting->Fcw_int = (uint16_t)((clock << table->SclkFcwRangeTable[sclk_setting->PllRange].post… in polaris10_calculate_sclk_params()
887 temp = clock << table->SclkFcwRangeTable[sclk_setting->PllRange].postdiv; in polaris10_calculate_sclk_params()
894 …= (uint16_t)((pcc_target_freq << table->SclkFcwRangeTable[sclk_setting->PllRange].postdiv) / ref_c… in polaris10_calculate_sclk_params()
901 … = (uint16_t)((ss_target_freq << table->SclkFcwRangeTable[sclk_setting->PllRange].postdiv) / ref_c… in polaris10_calculate_sclk_params()
902 temp = ss_target_freq << table->SclkFcwRangeTable[sclk_setting->PllRange].postdiv; in polaris10_calculate_sclk_params()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/powerplay/inc/
H A Dsmu74_discrete.h74 uint8_t PllRange; member
H A Dsmu75_discrete.h72 uint8_t PllRange; member