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Searched refs:Pat (Results 1 – 25 of 204) sorted by relevance

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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonDepMapAsm2Intrin.td14 def: Pat<(int_hexagon_A2_abs IntRegs:$src1),
16 def: Pat<(int_hexagon_A2_absp DoubleRegs:$src1),
18 def: Pat<(int_hexagon_A2_abssat IntRegs:$src1),
20 def: Pat<(int_hexagon_A2_add IntRegs:$src1, IntRegs:$src2),
22 def: Pat<(int_hexagon_A2_addh_h16_hh IntRegs:$src1, IntRegs:$src2),
24 def: Pat<(int_hexagon_A2_addh_h16_hl IntRegs:$src1, IntRegs:$src2),
26 def: Pat<(int_hexagon_A2_addh_h16_lh IntRegs:$src1, IntRegs:$src2),
28 def: Pat<(int_hexagon_A2_addh_h16_ll IntRegs:$src1, IntRegs:$src2),
30 def: Pat<(int_hexagon_A2_addh_h16_sat_hh IntRegs:$src1, IntRegs:$src2),
32 def: Pat<(int_hexagon_A2_addh_h16_sat_hl IntRegs:$src1, IntRegs:$src2),
[all …]
H A DHexagonPatternsHVX.td100 def: Pat<(ResType (Load (add (i32 AddrFI:$fi), ImmPred:$Off))),
102 def: Pat<(ResType (Load (IsOrAdd (i32 AddrFI:$fi), ImmPred:$Off))),
104 def: Pat<(ResType (Load AddrFI:$fi)), (ResType (MI AddrFI:$fi, 0))>;
109 def: Pat<(ResType (Load (add I32:$Rt, ImmPred:$Off))),
111 def: Pat<(ResType (Load I32:$Rt)),
119 def: Pat<(ResType (Load (HexagonCP tconstpool:$Addr))),
121 def: Pat<(ResType (Load (HexagonAtPcrel tconstpool:$Addr))),
136 def: Pat<(ResType (Load (valignaddr I32:$Rt))),
138 def: Pat<(ResType (Load (add (valignaddr I32:$Rt), ImmPred:$Off))),
164 def: Pat<(Store Value:$Vs, (add (i32 AddrFI:$fi), ImmPred:$Off)),
[all …]
H A DHexagonIntrinsics.td12 : Pat <(IntID I32:$Rs),
16 : Pat <(IntID I32:$Rs, I32:$Rt),
20 : Pat <(IntID I32:$Rs, I64:$Rt),
23 def: Pat<(int_hexagon_A2_add IntRegs:$Rs, IntRegs:$Rt),
25 def: Pat<(int_hexagon_A2_addi IntRegs:$Rs, timm:$s16),
27 def: Pat<(int_hexagon_A2_addp DoubleRegs:$Rs, DoubleRegs:$Rt),
30 def: Pat<(int_hexagon_A2_sub IntRegs:$Rs, IntRegs:$Rt),
32 def: Pat<(int_hexagon_A2_subri timm:$s10, IntRegs:$Rs),
34 def: Pat<(int_hexagon_A2_subp DoubleRegs:$Rs, DoubleRegs:$Rt),
37 def: Pat<(int_hexagon_M2_mpyi IntRegs:$Rs, IntRegs:$Rt),
[all …]
H A DHexagonMapAsm2IntrinV62.gen.td10 def: Pat<(IntID HvxVR:$src1, IntRegs:$src2),
12 def: Pat<(!cast<Intrinsic>(IntID#"_128B") HvxVR:$src1, IntRegs:$src2),
17 def: Pat<(IntID HvxVR:$src1, HvxVR:$src2, IntRegsLow8:$src3),
19 def: Pat<(!cast<Intrinsic>(IntID#"_128B") HvxVR:$src1, HvxVR:$src2,
25 def: Pat<(IntID HvxVR:$src1, HvxVR:$src2),
27 def: Pat<(!cast<Intrinsic>(IntID#"_128B") HvxVR:$src1, HvxVR:$src2),
32 def: Pat<(IntID HvxWR:$src1, HvxWR:$src2),
34 def: Pat<(!cast<Intrinsic>(IntID#"_128B") HvxWR:$src1, HvxWR:$src2),
39 def: Pat<(IntID HvxWR:$src1, HvxVR:$src2, HvxVR:$src3),
41 def: Pat<(!cast<Intrinsic>(IntID#"_128B") HvxWR:$src1, HvxVR:$src2,
[all …]
H A DHexagonIntrinsicsV60.td15 def : Pat < (v16i32 (int_hexagon_V6_lo (v32i32 HvxWR:$src1))),
18 def : Pat < (v16i32 (int_hexagon_V6_hi (v32i32 HvxWR:$src1))),
21 def : Pat < (v32i32 (int_hexagon_V6_lo_128B (v64i32 HvxWR:$src1))),
24 def : Pat < (v32i32 (int_hexagon_V6_hi_128B (v64i32 HvxWR:$src1))),
28 def : Pat <(v64i1 (bitconvert (v16i32 HvxVR:$src1))),
31 def : Pat <(v64i1 (bitconvert (v32i16 HvxVR:$src1))),
34 def : Pat <(v64i1 (bitconvert (v64i8 HvxVR:$src1))),
37 def : Pat <(v16i32 (bitconvert (v64i1 HvxQR:$src1))),
40 def : Pat <(v32i16 (bitconvert (v64i1 HvxQR:$src1))),
43 def : Pat <(v64i8 (bitconvert (v64i1 HvxQR:$src1))),
[all …]
H A DHexagonPatterns.td286 def: Pat<(IsOrAdd (i32 AddrFI:$Rs), s32_0ImmPred:$off),
323 : Pat<(ResVT (Op RegPred:$Rs)), (MI RegPred:$Rs)>;
327 : Pat<(ResType (Op RegPred:$Rs, ImmPred:$I)),
332 : Pat<(ResType (Op RsPred:$Rs, RtPred:$Rt)),
337 : Pat<(AccOp RegPred:$Rx, (Op RegPred:$Rs, ImmPred:$I)),
342 : Pat<(AccOp RxPred:$Rx, (Op RsPred:$Rs, RtPred:$Rt)),
347 def: Pat<(select (i1 (CmpOp Val:$A, Val:$B)), Val:$A, Val:$B),
349 def: Pat<(select (i1 (CmpOp Val:$A, Val:$B)), Val:$B, Val:$A),
356 def: Pat<(Sel (CmpType (CmpOp CmpPred:$Vs, CmpPred:$Vt)),
359 def: Pat<(Sel (CmpType (CmpOp CmpPred:$Vs, CmpPred:$Vt)),
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/VE/
H A DVEInstrIntrinsicVL.gen.td1 def : Pat<(int_ve_vl_vld_vssl i64:$sy, i64:$sz, i32:$vl), (VLDrrl i64:$sy, i64:$sz, i32:$vl)>;
2 def : Pat<(int_ve_vl_vld_vssvl i64:$sy, i64:$sz, v256f64:$pt, i32:$vl), (VLDrrl_v i64:$sy, i64:$sz,…
3 def : Pat<(int_ve_vl_vld_vssl simm7:$I, i64:$sz, i32:$vl), (VLDirl (LO7 $I), i64:$sz, i32:$vl)>;
4 def : Pat<(int_ve_vl_vld_vssvl simm7:$I, i64:$sz, v256f64:$pt, i32:$vl), (VLDirl_v (LO7 $I), i64:$s…
5 def : Pat<(int_ve_vl_vldnc_vssl i64:$sy, i64:$sz, i32:$vl), (VLDNCrrl i64:$sy, i64:$sz, i32:$vl)>;
6 def : Pat<(int_ve_vl_vldnc_vssvl i64:$sy, i64:$sz, v256f64:$pt, i32:$vl), (VLDNCrrl_v i64:$sy, i64:…
7 def : Pat<(int_ve_vl_vldnc_vssl simm7:$I, i64:$sz, i32:$vl), (VLDNCirl (LO7 $I), i64:$sz, i32:$vl)>;
8 def : Pat<(int_ve_vl_vldnc_vssvl simm7:$I, i64:$sz, v256f64:$pt, i32:$vl), (VLDNCirl_v (LO7 $I), i6…
9 def : Pat<(int_ve_vl_vldu_vssl i64:$sy, i64:$sz, i32:$vl), (VLDUrrl i64:$sy, i64:$sz, i32:$vl)>;
10 def : Pat<(int_ve_vl_vldu_vssvl i64:$sy, i64:$sz, v256f64:$pt, i32:$vl), (VLDUrrl_v i64:$sy, i64:$s…
[all …]
H A DVEInstrIntrinsicVL.td6 def : Pat<(int_ve_vl_svob), (SVOB)>;
9 def : Pat<(i64 (int_ve_vl_pack_f32p ADDRrii:$addr0, ADDRrii:$addr1)),
13 def : Pat<(i64 (int_ve_vl_pack_f32a ADDRrii:$addr)),
21 def : Pat<(v256i1 (int_ve_vl_extract_vm512u v512i1:$vm)),
24 def : Pat<(v256i1 (int_ve_vl_extract_vm512l v512i1:$vm)),
27 def : Pat<(v512i1 (int_ve_vl_insert_vm512u v512i1:$vmx, v256i1:$vmy)),
30 def : Pat<(v512i1 (int_ve_vl_insert_vm512l v512i1:$vmx, v256i1:$vmy)),
34 def : Pat<(int_ve_vl_vmrgw_vsvMl i32:$sy, v256f64:$vz, v512i1:$vm, i32:$vl),
36 def : Pat<(int_ve_vl_vmrgw_vsvMvl i32:$sy, v256f64:$vz, v512i1:$vm,
42 def : Pat<(int_ve_vl_vmv_vsvl i32:$sy, v256f64:$vz, i32:$vl),
[all …]
H A DVEInstrInfo.td979 def : Pat<(iPTR ADDRrri:$addr), (LEArri MEMrri:$addr)>;
980 def : Pat<(iPTR ADDRrii:$addr), (LEArii MEMrii:$addr)>;
981 def : Pat<(add I64:$base, simm32:$disp), (LEArii $base, 0, (LO32 $disp))>;
982 def : Pat<(add I64:$base, lozero:$disp), (LEASLrii $base, 0, (HI32 $disp))>;
1008 def : Pat<(f64 (load ADDRrri:$addr)), (LDrri MEMrri:$addr)>;
1009 def : Pat<(f64 (load ADDRrii:$addr)), (LDrii MEMrii:$addr)>;
1010 def : Pat<(f64 (load ADDRzri:$addr)), (LDzri MEMzri:$addr)>;
1011 def : Pat<(f64 (load ADDRzii:$addr)), (LDzii MEMzii:$addr)>;
1066 def : Pat<(store f64:$src, ADDRrri:$addr), (STrri MEMrri:$addr, $src)>;
1067 def : Pat<(store f64:$src, ADDRrii:$addr), (STrii MEMrii:$addr, $src)>;
[all …]
H A DVEInstrPatternsVec.td21 def : Pat<(v32 (vec_broadcast (s32 ImmOp:$sy), i32:$vl)),
25 def : Pat<(v32 (vec_broadcast s32:$sy, i32:$vl)),
32 def : Pat<(v64 (vec_broadcast (s64 ImmOp:$sy), i32:$vl)),
36 def : Pat<(v64 (vec_broadcast s64:$sy, i32:$vl)),
44 def: Pat<(s32 (extractelt v32:$vec, uimm7:$idx)),
47 def: Pat<(s32 (extractelt v32:$vec, i64:$idx)),
51 def: Pat<(v32 (insertelt v32:$vec, s32:$val, uimm7:$idx)),
54 def: Pat<(v32 (insertelt v32:$vec, s32:$val, i64:$idx)),
60 def: Pat<(s64 (extractelt v64:$vec, uimm7:$idx)),
63 def: Pat<(s64 (extractelt v64:$vec, i64:$idx)),
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64InstrAtomics.td19 def : Pat<(atomic_fence (i64 4), (timm)), (DMB (i32 0x9))>;
20 def : Pat<(atomic_fence (timm), (timm)), (DMB (i32 0xb))>;
46 def : Pat<(acquiring_load<atomic_load_8> GPR64sp:$ptr), (LDARB GPR64sp:$ptr)>;
47 def : Pat<(relaxed_load<atomic_load_8> (ro_Windexed8 GPR64sp:$Rn, GPR32:$Rm,
50 def : Pat<(relaxed_load<atomic_load_8> (ro_Xindexed8 GPR64sp:$Rn, GPR64:$Rm,
53 def : Pat<(relaxed_load<atomic_load_8> (am_indexed8 GPR64sp:$Rn,
56 def : Pat<(relaxed_load<atomic_load_8>
61 def : Pat<(acquiring_load<atomic_load_16> GPR64sp:$ptr), (LDARH GPR64sp:$ptr)>;
62 def : Pat<(relaxed_load<atomic_load_16> (ro_Windexed16 GPR64sp:$Rn, GPR32:$Rm,
65 def : Pat<(relaxed_load<atomic_load_16> (ro_Xindexed16 GPR64sp:$Rn, GPR64:$Rm,
[all …]
H A DAArch64InstrInfo.td715 def : Pat<(AArch64LOADgot tglobaltlsaddr:$addr),
718 def : Pat<(AArch64LOADgot texternalsym:$addr),
721 def : Pat<(AArch64LOADgot tconstpool:$addr),
865 def : Pat<(v2f32 (int_aarch64_neon_bfdot
937 : Pat<(VecTy (OpNode (VecTy V128:$Vd), (VecTy V128:$Vn), (VecTy V128:$Vm))),
940 def : Pat<(v2i64 (int_aarch64_crypto_sha512su0 (v2i64 V128:$Vn), (v2i64 V128:$Vm))),
967 def : Pat<(v2i64 (int_aarch64_crypto_rax1 (v2i64 V128:$Vn), (v2i64 V128:$Vm))),
970 def : Pat<(v2i64 (int_aarch64_crypto_xar (v2i64 V128:$Vn), (v2i64 V128:$Vm), (i64 timm0_63:$imm))),
987 def : Pat<(v4i32 (int_aarch64_crypto_sm3ss1 (v4i32 V128:$Vn), (v4i32 V128:$Vm), (v4i32 V128:$Va))),
991 : Pat<(v4i32 (OpNode (v4i32 V128:$Vd), (v4i32 V128:$Vn), (v4i32 V128:$Vm))),
[all …]
H A DAArch64SVEInstrInfo.td483 def : Pat<(Ty (AArch64fma_p PredTy:$P, Ty:$Zn, Ty:$Zm, Ty:$Za)),
487 …def : Pat<(Ty (AArch64fma_p PredTy:$P, (AArch64fneg_mt PredTy:$P, Ty:$Zn, (Ty (undef))), Ty:$Zm, T…
491 …def : Pat<(Ty (AArch64fma_p PredTy:$P, Ty:$Zn, Ty:$Zm, (AArch64fneg_mt PredTy:$P, Ty:$Za, (Ty (und…
495 …def : Pat<(Ty (AArch64fma_p PredTy:$P, (AArch64fneg_mt PredTy:$P, Ty:$Zn, (Ty (undef))), Ty:$Zm, (…
499 …def : Pat<(AArch64fneg_mt PredTy:$P, (AArch64fma_p PredTy:$P, Ty:$Zn, Ty:$Zm, Ty:$Za), (Ty (undef)…
503 …def : Pat<(vselect (PredTy PPR:$Pg), (Ty (AArch64fma_p (PredTy (AArch64ptrue 31)), ZPR:$Zn, ZPR:$Z…
507 …def : Pat<(vselect (PredTy PPR:$Pg), (Ty (AArch64fma_p (PredTy (AArch64ptrue 31)), (AArch64fneg_mt…
553 def : Pat<(nxv8f16 (AArch64dup (f16 FPR16:$src))),
555 def : Pat<(nxv4f16 (AArch64dup (f16 FPR16:$src))),
557 def : Pat<(nxv2f16 (AArch64dup (f16 FPR16:$src))),
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86InstrVecCompiler.td10 // compiler, as well as Pat patterns used during instruction selection.
20 def : Pat<(f32 (extractelt (v4f32 VR128:$src), (iPTR 0))),
22 def : Pat<(f64 (extractelt (v2f64 VR128:$src), (iPTR 0))),
28 def : Pat<(f32 (extractelt (v4f32 VR128X:$src), (iPTR 0))),
30 def : Pat<(f64 (extractelt (v2f64 VR128X:$src), (iPTR 0))),
36 def : Pat<(v4f32 (scalar_to_vector FR32:$src)),
39 def : Pat<(v2f64 (scalar_to_vector FR64:$src)),
45 def : Pat<(v4f32 (scalar_to_vector FR32X:$src)),
48 def : Pat<(v2f64 (scalar_to_vector FR64X:$src)),
60 def : Pat<(subVT (extract_subvector (VT RC:$src), (iPTR 0))),
[all …]
H A DX86InstrCompiler.td10 // as well as Pat patterns used during instruction selection.
48 def : Pat<(X86callseq_start timm:$amt1, timm:$amt2),
66 def : Pat<(X86callseq_start timm:$amt1, timm:$amt2),
293 def : Pat<(i8 0), (EXTRACT_SUBREG (MOV32r0), sub_8bit)>;
294 def : Pat<(i16 0), (EXTRACT_SUBREG (MOV32r0), sub_16bit)>;
295 def : Pat<(i64 0), (SUBREG_TO_REG (i64 0), (MOV32r0), sub_32bit)>;
312 def : Pat<(i16 1), (EXTRACT_SUBREG (MOV32r1), sub_16bit)>;
313 def : Pat<(i16 -1), (EXTRACT_SUBREG (MOV32r_1), sub_16bit)>;
338 def : Pat<(i64 mov64imm32:$src), (MOV32ri64 mov64imm32:$src)>;
343 // FIXME: These are pseudo ops that should be replaced with Pat<> patterns.
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
H A DPPCInstrVSX.td296 def : Pat<(Ty (scalar_to_vector In)), (Ty NonPermOut)>;
297 def : Pat<(Ty (PPCSToV In)), (Ty PermOut)>;
2486 def : Pat<(v16i8 (int_ppc_altivec_crypto_vpermxor v16i8:$a,
2491 def : Pat<(v16i8 (int_ppc_altivec_crypto_vpermxor v16i8:$a,
2498 def : Pat<(v4i32 (vnot v4i32:$A)),
2500 def : Pat<(v4i32 (or (and (vnot v4i32:$C), v4i32:$A),
2505 def : Pat<(PPCfnmsub f64:$A, f64:$B, f64:$C),
2507 def : Pat<(fneg (PPCfnmsub f64:$A, f64:$B, f64:$C)),
2509 def : Pat<(PPCfnmsub f64:$A, f64:$B, (fneg f64:$C)),
2512 def : Pat<(PPCfnmsub v2f64:$A, v2f64:$B, v2f64:$C),
[all …]
H A DPPCInstrHTM.td97 def : Pat<(int_ppc_tbegin i32:$R),
100 def : Pat<(int_ppc_tend i32:$R),
103 def : Pat<(int_ppc_tabort i32:$R),
106 def : Pat<(int_ppc_tabortwc i32:$TO, i32:$RA, i32:$RB),
109 def : Pat<(int_ppc_tabortwci i32:$TO, i32:$RA, i32:$SI),
112 def : Pat<(int_ppc_tabortdc i32:$TO, i32:$RA, i32:$RB),
115 def : Pat<(int_ppc_tabortdci i32:$TO, i32:$RA, i32:$SI),
118 def : Pat<(int_ppc_tcheck),
121 def : Pat<(int_ppc_treclaim i32:$RA),
124 def : Pat<(int_ppc_trechkpt),
[all …]
H A DPPCInstrAltivec.td871 def : Pat<(int_ppc_altivec_dssall), (NOP)>;
873 def : Pat<(int_ppc_altivec_dssall), (DSSALL)>;
876 def : Pat<(v16i8 (rotl v16i8:$vA, v16i8:$vB)),
878 def : Pat<(v8i16 (rotl v8i16:$vA, v8i16:$vB)),
880 def : Pat<(v4i32 (rotl v4i32:$vA, v4i32:$vB)),
884 def : Pat<(mul v8i16:$vA, v8i16:$vB), (VMLADDUHM $vA, $vB, (v8i16(V_SET0H)))>;
887 def : Pat<(add (mul v8i16:$vA, v8i16:$vB), v8i16:$vC), (VMLADDUHM $vA, $vB, $vC)>;
890 def : Pat<(v16i8 (saddsat v16i8:$vA, v16i8:$vB)), (v16i8 (VADDSBS $vA, $vB))>;
891 def : Pat<(v16i8 (uaddsat v16i8:$vA, v16i8:$vB)), (v16i8 (VADDUBS $vA, $vB))>;
892 def : Pat<(v8i16 (saddsat v8i16:$vA, v8i16:$vB)), (v8i16 (VADDSHS $vA, $vB))>;
[all …]
H A DPPCInstrPrefix.td1370 def : Pat<(v512i1 (int_ppc_mma_xvi4ger8 v16i8:$XA, v16i8:$XB)),
1372 def : Pat<(v512i1 (int_ppc_mma_xvi4ger8pp v512i1:$ATi, v16i8:$XA, v16i8:$XB)),
1375 def : Pat<(v512i1 (int_ppc_mma_xvi8ger4 v16i8:$XA, v16i8:$XB)),
1377 def : Pat<(v512i1 (int_ppc_mma_xvi8ger4pp v512i1:$ATi, v16i8:$XA, v16i8:$XB)),
1380 def : Pat<(v512i1 (int_ppc_mma_xvi16ger2s v16i8:$XA, v16i8:$XB)),
1382 def : Pat<(v512i1 (int_ppc_mma_xvi16ger2spp v512i1:$ATi, v16i8:$XA, v16i8:$XB)),
1385 def : Pat<(v512i1 (int_ppc_mma_xvf16ger2 v16i8:$XA, v16i8:$XB)),
1387 def : Pat<(v512i1 (int_ppc_mma_xvf16ger2pp v512i1:$ATi, v16i8:$XA, v16i8:$XB)),
1389 def : Pat<(v512i1 (int_ppc_mma_xvf16ger2pn v512i1:$ATi, v16i8:$XA, v16i8:$XB)),
1391 def : Pat<(v512i1 (int_ppc_mma_xvf16ger2np v512i1:$ATi, v16i8:$XA, v16i8:$XB)),
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/M68k/
H A DM68kInstrCompiler.td11 /// as well as Pat patterns used during instruction selection.
19 def : Pat<(i32 (MxWrapper tconstpool :$src)), (MOV32ri tconstpool :$src)>;
20 def : Pat<(i32 (MxWrapper tglobaladdr :$src)), (MOV32ri tglobaladdr :$src)>;
21 def : Pat<(i32 (MxWrapper texternalsym :$src)), (MOV32ri texternalsym :$src)>;
22 def : Pat<(i32 (MxWrapper tjumptable :$src)), (MOV32ri tjumptable :$src)>;
23 def : Pat<(i32 (MxWrapper tblockaddress :$src)), (MOV32ri tblockaddress :$src)>;
25 def : Pat<(add MxDRD32:$src, (MxWrapper tconstpool:$opd)),
27 def : Pat<(add MxARD32:$src, (MxWrapper tjumptable:$opd)),
29 def : Pat<(add MxARD32:$src, (MxWrapper tglobaladdr :$opd)),
31 def : Pat<(add MxARD32:$src, (MxWrapper texternalsym:$opd)),
[all …]
H A DM68kInstrArithmetic.td490 def : Pat<(sext_inreg i16:$src, i8), (EXT16 $src)>;
491 def : Pat<(sext_inreg i32:$src, i16), (EXT32 $src)>;
492 def : Pat<(sext_inreg i32:$src, i8),
555 def : Pat<(sdiv i8:$dst, i8:$opd),
560 def : Pat<(udiv i8:$dst, i8:$opd),
565 def : Pat<(srem i8:$dst, i8:$opd),
570 def : Pat<(urem i8:$dst, i8:$opd),
576 def : Pat<(sdiv i16:$dst, i16:$opd),
581 def : Pat<(udiv i16:$dst, i16:$opd),
586 def : Pat<(srem i16:$dst, i16:$opd),
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/
H A DSparcInstr64Bit.td21 def : Pat<(i64 (anyext i32:$val)), (COPY_TO_REGCLASS $val, I64Regs)>;
22 def : Pat<(i32 (trunc i64:$val)), (COPY_TO_REGCLASS $val, IntRegs)>;
39 def : Pat<(i64 (zext i32:$val)), (SRLri $val, 0)>;
40 def : Pat<(i64 (sext i32:$val)), (SRAri $val, 0)>;
42 def : Pat<(i64 (and i64:$val, 0xffffffff)), (SRLri $val, 0)>;
43 def : Pat<(i64 (sext_inreg i64:$val, i32)), (SRAri $val, 0)>;
67 def : Pat<(i64 simm13:$val), (ORri (i64 G0), (as_i32imm $val))>;
68 def : Pat<(i64 SETHIimm:$val), (SETHIi (HI22 $val))>;
74 def : Pat<(i64 uimm32:$val), (ORri (SETHIi (HI22 $val)), (LO10 $val))>,
92 def : Pat<(i64 nimm33:$val), (XORri (SETHIi (HIX22 $val)), (LOX10 $val))>,
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
H A DRISCVInstrInfoVSDPatterns.td64 def : Pat<(type (load BaseAddr:$rs1)),
67 def : Pat<(store type:$rs2, BaseAddr:$rs1),
83 def : Pat<(type (load BaseAddr:$rs1)),
86 def : Pat<(store type:$rs2, BaseAddr:$rs1),
95 def : Pat<(m.Mask (load BaseAddr:$rs1)),
98 def : Pat<(store m.Mask:$rs2, BaseAddr:$rs1),
112 Pat<(result_type (vop
133 Pat<(result_type (vop
177 Pat<(result_type (vop (vop_type vop_reg_class:$rs1),
198 def : Pat<(fvti.Vector (vop (fvti.Vector (splat_vector fvti.Scalar:$rs2)),
[all …]
H A DRISCVInstrInfoVVLPatterns.td245 def : Pat<(result_type (vop
254 def : Pat<(result_type (vop
278 def : Pat<(result_type (vop
287 def : Pat<(result_type (vop
333 Pat<(result_type (vop (vop_type vop_reg_class:$rs1),
356 def : Pat<(fvti.Vector (vop (SplatFPOp fvti.ScalarRegClass:$rs2),
367 def : Pat<(vti.Mask (riscv_setcc_vl (vti.Vector vti.RegClass:$rs1),
380 def : Pat<(vti.Mask (riscv_setcc_vl (vti.Vector vti.RegClass:$rs2),
392 def : Pat<(vti.Mask (riscv_setcc_vl (vti.Vector vti.RegClass:$rs1),
397 def : Pat<(vti.Mask (riscv_setcc_vl (SplatPat (XLenVT GPR:$rs2)),
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/
H A DWebAssemblyInstrFloat.td70 def : Pat<(fcopysign F64:$lhs, F32:$rhs),
72 def : Pat<(fcopysign F32:$lhs, F64:$rhs),
76 def : Pat<(frint f32:$src), (NEAREST_F32 f32:$src)>;
77 def : Pat<(frint f64:$src), (NEAREST_F64 f64:$src)>;
89 def : Pat<(seteq f32:$lhs, f32:$rhs), (EQ_F32 f32:$lhs, f32:$rhs)>;
90 def : Pat<(setne f32:$lhs, f32:$rhs), (NE_F32 f32:$lhs, f32:$rhs)>;
91 def : Pat<(setlt f32:$lhs, f32:$rhs), (LT_F32 f32:$lhs, f32:$rhs)>;
92 def : Pat<(setle f32:$lhs, f32:$rhs), (LE_F32 f32:$lhs, f32:$rhs)>;
93 def : Pat<(setgt f32:$lhs, f32:$rhs), (GT_F32 f32:$lhs, f32:$rhs)>;
94 def : Pat<(setge f32:$lhs, f32:$rhs), (GE_F32 f32:$lhs, f32:$rhs)>;
[all …]

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