Searched refs:PIPE_CONTROL_L3_RO_CACHE_INVALIDATE (Results 1 – 2 of 2) sorted by relevance
240 #define PIPE_CONTROL_L3_RO_CACHE_INVALIDATE REG_BIT(10) /* gen12 */ macro
4053 flags |= PIPE_CONTROL_L3_RO_CACHE_INVALIDATE; in gen12_emit_flush_render()