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Searched refs:PCIE_BAR3_CNTL__BAR_SIZE_MASK (Results 1 – 4 of 4) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/bif/
H A Dbif_4_1_sh_mask.h1491 #define PCIE_BAR3_CNTL__BAR_SIZE_MASK 0x1f00 macro
H A Dbif_5_0_sh_mask.h1727 #define PCIE_BAR3_CNTL__BAR_SIZE_MASK 0x1f00 macro
H A Dbif_5_1_sh_mask.h1593 #define PCIE_BAR3_CNTL__BAR_SIZE_MASK 0x1f00 macro
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_0_sh_mask.h3832 #define PCIE_BAR3_CNTL__BAR_SIZE_MASK … macro