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Searched refs:OpVT (Results 1 – 25 of 28) sorted by relevance

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/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DRuntimeLibcalls.h38 Libcall getFPEXT(EVT OpVT, EVT RetVT);
42 Libcall getFPROUND(EVT OpVT, EVT RetVT);
46 Libcall getFPTOSINT(EVT OpVT, EVT RetVT);
50 Libcall getFPTOUINT(EVT OpVT, EVT RetVT);
54 Libcall getSINTTOFP(EVT OpVT, EVT RetVT);
58 Libcall getUINTTOFP(EVT OpVT, EVT RetVT);
H A DSelectionDAG.h652 SDValue getBoolConstant(bool V, const SDLoc &DL, EVT VT, EVT OpVT);
884 SDValue getBoolExtOrTrunc(SDValue Op, const SDLoc &SL, EVT VT, EVT OpVT);
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DTargetLoweringBase.cpp216 RTLIB::Libcall RTLIB::getFPEXT(EVT OpVT, EVT RetVT) { in getFPEXT() argument
217 if (OpVT == MVT::f16) { in getFPEXT()
224 } else if (OpVT == MVT::f32) { in getFPEXT()
231 } else if (OpVT == MVT::f64) { in getFPEXT()
236 } else if (OpVT == MVT::f80) { in getFPEXT()
246 RTLIB::Libcall RTLIB::getFPROUND(EVT OpVT, EVT RetVT) { in getFPROUND() argument
248 if (OpVT == MVT::f32) in getFPROUND()
250 if (OpVT == MVT::f64) in getFPROUND()
252 if (OpVT == MVT::f80) in getFPROUND()
254 if (OpVT == MVT::f128) in getFPROUND()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeFloatTypes.cpp165 EVT OpVT = N->getOperand(0 + Offset).getValueType(); in SoftenFloatRes_Unary() local
166 CallOptions.setTypeListBeforeSoften(OpVT, N->getValueType(0), true); in SoftenFloatRes_Unary()
514 EVT OpVT = N->getOperand(IsStrict ? 1 : 0).getValueType(); in SoftenFloatRes_FP_EXTEND() local
515 CallOptions.setTypeListBeforeSoften(OpVT, N->getValueType(0), true); in SoftenFloatRes_FP_EXTEND()
551 EVT OpVT = N->getOperand(IsStrict ? 1 : 0).getValueType(); in SoftenFloatRes_FP_ROUND() local
552 CallOptions.setTypeListBeforeSoften(OpVT, N->getValueType(0), true); in SoftenFloatRes_FP_ROUND()
1095 EVT OpVT = N->getOperand(0 + Offset).getValueType(); in SoftenFloatOp_Unary() local
1096 CallOptions.setTypeListBeforeSoften(OpVT, N->getValueType(0), true); in SoftenFloatOp_Unary()
1110 EVT OpVT = N->getOperand(N->isStrictFPOpcode() ? 1 : 0).getValueType(); in SoftenFloatOp_LROUND() local
1111 return SoftenFloatOp_Unary(N, GetFPLibCall(OpVT, in SoftenFloatOp_LROUND()
[all …]
H A DSelectionDAG.cpp1281 EVT OpVT) { in getBoolExtOrTrunc() argument
1285 TargetLowering::BooleanContent BType = TLI->getBooleanContents(OpVT); in getBoolExtOrTrunc()
1290 EVT OpVT = Op.getValueType(); in getZeroExtendInReg() local
1291 assert(VT.isInteger() && OpVT.isInteger() && in getZeroExtendInReg()
1293 assert(VT.isVector() == OpVT.isVector() && in getZeroExtendInReg()
1297 VT.getVectorElementCount() == OpVT.getVectorElementCount()) && in getZeroExtendInReg()
1299 assert(VT.bitsLE(OpVT) && "Not extending!"); in getZeroExtendInReg()
1300 if (OpVT == VT) in getZeroExtendInReg()
1302 APInt Imm = APInt::getLowBitsSet(OpVT.getScalarSizeInBits(), in getZeroExtendInReg()
1304 return getNode(ISD::AND, DL, OpVT, Op, getConstant(Imm, DL, OpVT)); in getZeroExtendInReg()
[all …]
H A DTargetLowering.cpp3150 EVT OpVT = N0.getValueType(); in foldSetCCWithAnd() local
3151 if (N0.getOpcode() != ISD::AND || !OpVT.isInteger() || in foldSetCCWithAnd()
3167 SDValue Zero = DAG.getConstant(0, DL, OpVT); in foldSetCCWithAnd()
3173 assert(OpVT.isInteger()); in foldSetCCWithAnd()
3174 Cond = ISD::getSetCCInverse(Cond, OpVT); in foldSetCCWithAnd()
3192 SDValue NotX = DAG.getNOT(SDLoc(X), X, OpVT); in foldSetCCWithAnd()
3193 SDValue NewAnd = DAG.getNode(ISD::AND, SDLoc(N0), OpVT, NotX, Y); in foldSetCCWithAnd()
3384 EVT OpVT = N0.getValueType(); in foldSetCCWithBinOp() local
3388 return DAG.getSetCC(DL, VT, Y, DAG.getConstant(0, DL, OpVT), Cond); in foldSetCCWithBinOp()
3396 return DAG.getSetCC(DL, VT, X, DAG.getConstant(0, DL, OpVT), Cond); in foldSetCCWithBinOp()
[all …]
H A DLegalizeVectorTypes.cpp323 EVT OpVT = Op.getValueType(); in ScalarizeVecRes_FP_ROUND() local
326 if (getTypeAction(OpVT) == TargetLowering::TypeScalarizeVector) { in ScalarizeVecRes_FP_ROUND()
329 EVT VT = OpVT.getVectorElementType(); in ScalarizeVecRes_FP_ROUND()
375 EVT OpVT = Op.getValueType(); in ScalarizeVecRes_UnaryOp() local
384 if (getTypeAction(OpVT) == TargetLowering::TypeScalarizeVector) { in ScalarizeVecRes_UnaryOp()
387 EVT VT = OpVT.getVectorElementType(); in ScalarizeVecRes_UnaryOp()
406 EVT OpVT = Op.getValueType(); in ScalarizeVecRes_VecInregOp() local
407 EVT OpEltVT = OpVT.getVectorElementType(); in ScalarizeVecRes_VecInregOp()
410 if (getTypeAction(OpVT) == TargetLowering::TypeScalarizeVector) { in ScalarizeVecRes_VecInregOp()
441 EVT OpVT = Cond.getValueType(); in ScalarizeVecRes_VSELECT() local
[all …]
H A DScheduleDAGSDNodes.cpp483 EVT OpVT = N->getOperand(i).getValueType(); in AddSchedEdges() local
484 assert(OpVT != MVT::Glue && "Glued nodes should be in same sunit!"); in AddSchedEdges()
485 bool isChain = OpVT == MVT::Other; in AddSchedEdges()
H A DLegalizeVectorOps.cpp499 MVT OpVT = Node->getOperand(0).getSimpleValueType(); in LegalizeOp() local
501 Action = TLI.getCondCodeAction(CCCode, OpVT); in LegalizeOp()
1354 MVT OpVT = Node->getOperand(0).getSimpleValueType(); in ExpandSETCC() local
1357 if (TLI.getCondCodeAction(CCCode, OpVT) != TargetLowering::Expand) { in ExpandSETCC()
H A DInstrEmitter.cpp385 MVT OpVT = Op.getSimpleValueType(); in AddOperand() local
390 TLI->isTypeLegal(OpVT) in AddOperand()
391 ? TLI->getRegClassFor(OpVT, in AddOperand()
H A DLegalizeTypes.cpp307 EVT OpVT = Op.getValueType(); in run() local
308 switch (getTypeAction(OpVT)) { in run()
H A DDAGCombiner.cpp4963 EVT OpVT = LL.getValueType(); in foldLogicOfSetCCs() local
4965 if (VT != getSetCCResultType(OpVT)) in foldLogicOfSetCCs()
4967 if (OpVT != RL.getValueType()) in foldLogicOfSetCCs()
4972 bool IsInteger = OpVT.isInteger(); in foldLogicOfSetCCs()
4991 SDValue Or = DAG.getNode(ISD::OR, SDLoc(N0), OpVT, LL, RL); in foldLogicOfSetCCs()
5010 SDValue And = DAG.getNode(ISD::AND, SDLoc(N0), OpVT, LL, RL); in foldLogicOfSetCCs()
5018 if (IsAnd && LL == RL && CC0 == CC1 && OpVT.getScalarSizeInBits() > 1 && in foldLogicOfSetCCs()
5022 SDValue One = DAG.getConstant(1, DL, OpVT); in foldLogicOfSetCCs()
5023 SDValue Two = DAG.getConstant(2, DL, OpVT); in foldLogicOfSetCCs()
5024 SDValue Add = DAG.getNode(ISD::ADD, SDLoc(N0), OpVT, LL, One); in foldLogicOfSetCCs()
[all …]
H A DLegalizeDAG.cpp1045 MVT OpVT = Node->getOperand(CompareOperand).getSimpleValueType(); in LegalizeOp() local
1048 Action = TLI.getCondCodeAction(CCCode, OpVT); in LegalizeOp()
1054 Action = TLI.getOperationAction(Node->getOpcode(), OpVT); in LegalizeOp()
1860 EVT OpVT = Node->getOperand(0).getValueType(); in ExpandBUILD_VECTOR() local
1902 if (OpVT==EltVT) in ExpandBUILD_VECTOR()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp2369 EVT OpVT = Op.getOperand(0).getValueType(); in LowerSINT_TO_FP() local
2370 assert(OpVT == MVT::i32 || (OpVT == MVT::i64)); in LowerSINT_TO_FP()
2372 EVT floatVT = (OpVT == MVT::i32) ? MVT::f32 : MVT::f64; in LowerSINT_TO_FP()
2376 && (!hasHardQuad || !TLI.isTypeLegal(OpVT))) { in LowerSINT_TO_FP()
2377 const char *libName = TLI.getLibcallName(OpVT == MVT::i32 in LowerSINT_TO_FP()
2384 if (!TLI.isTypeLegal(OpVT)) in LowerSINT_TO_FP()
2389 unsigned opcode = (OpVT == MVT::i32)? SPISD::ITOF : SPISD::XTOF; in LowerSINT_TO_FP()
2418 EVT OpVT = Op.getOperand(0).getValueType(); in LowerUINT_TO_FP() local
2419 assert(OpVT == MVT::i32 || OpVT == MVT::i64); in LowerUINT_TO_FP()
2423 if (Op.getValueType() != MVT::f128 || (hasHardQuad && TLI.isTypeLegal(OpVT))) in LowerUINT_TO_FP()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86InstrSSE.td2209 ValueType OpVT, RegisterClass RC, PatFrag memop_frag,
2218 [(set RC:$dst, (OpVT (OpNode RC:$src1, RC:$src2)))]>,
2225 [(set RC:$dst, (OpVT (OpNode RC:$src1, (memop_frag addr:$src2))))]>,
4672 ValueType DstVT, ValueType OpVT, RegisterClass RC,
4681 [(set RC:$dst, (DstVT (OpNode (OpVT RC:$src1), RC:$src2)))]>,
4689 (DstVT (OpNode (OpVT RC:$src1), (memop_frag addr:$src2))))]>,
5737 ValueType OpVT, RegisterClass RC, PatFrag memop_frag,
5746 [(set RC:$dst, (OpVT (OpNode RC:$src1, RC:$src2)))]>,
5754 (OpVT (OpNode RC:$src1, (memop_frag addr:$src2))))]>,
5897 ValueType OpVT, RegisterClass RC, PatFrag memop_frag,
[all …]
H A DX86ISelLowering.cpp6139 EVT OpVT = Op.getValueType(); in SplitOpsAndApply() local
6140 unsigned NumSubElts = OpVT.getVectorNumElements() / NumSubs; in SplitOpsAndApply()
6141 unsigned SizeSub = OpVT.getSizeInBits() / NumSubs; in SplitOpsAndApply()
6166 MVT OpVT = Op.getSimpleValueType(); in insert1BitVector() local
6167 unsigned NumElems = OpVT.getVectorNumElements(); in insert1BitVector()
6171 MVT WideOpVT = OpVT; in insert1BitVector()
6182 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, OpVT, Op, ZeroIdx); in insert1BitVector()
6205 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, OpVT, Op, ZeroIdx); in insert1BitVector()
6215 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, OpVT, SubVec, ZeroIdx); in insert1BitVector()
6228 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, OpVT, SubVec, ZeroIdx); in insert1BitVector()
[all …]
H A DX86InstrFMA.td391 X86MemOperand x86memop, ValueType OpVT, SDPatternOperator OpNode,
399 (OpVT (OpNode RC:$src1, RC:$src2, RC:$src3)))]>, VEX_W, VEX_LIG,
H A DX86ISelDAGToDAG.cpp537 EVT OpVT = N->getOperand(0).getValueType(); in isLegalMaskCompare() local
541 OpVT = N->getOperand(1).getValueType(); in isLegalMaskCompare()
542 if (OpVT.is256BitVector() || OpVT.is128BitVector()) in isLegalMaskCompare()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DR600ISelLowering.cpp1836 EVT OpVT = Ops[0].getValueType(); in PerformDAGCombine() local
1837 if (InVal.getValueType() != OpVT) in PerformDAGCombine()
1838 InVal = OpVT.bitsGT(InVal.getValueType()) ? in PerformDAGCombine()
1839 DAG.getNode(ISD::ANY_EXTEND, DL, OpVT, InVal) : in PerformDAGCombine()
1840 DAG.getNode(ISD::TRUNCATE, DL, OpVT, InVal); in PerformDAGCombine()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonISelDAGToDAG.cpp1169 EVT OpVT = OpI1.getValueType(); in ppHoistZextI1() local
1170 if (!OpVT.isSimple() || OpVT.getSimpleVT() != MVT::i1) in ppHoistZextI1()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp3267 MVT OpVT = ScalarOp.getSimpleValueType(); in lowerVectorIntrinsicSplats() local
3271 if (!OpVT.isScalarInteger() || OpVT == XLenVT) in lowerVectorIntrinsicSplats()
3275 if (OpVT.bitsLT(XLenVT)) { in lowerVectorIntrinsicSplats()
3296 assert(XLenVT == MVT::i32 && OpVT == MVT::i64 && in lowerVectorIntrinsicSplats()
4330 MVT OpVT = V.getSimpleValueType(); in lowerVPOp() local
4331 MVT ContainerVT = getContainerForFixedLengthVector(OpVT); in lowerVPOp()
4332 assert(useRVVForFixedLengthVectorVT(OpVT) && in lowerVPOp()
4647 EVT OpVT = Op0.getValueType(); in ReplaceNodeResults() local
4648 CallOptions.setTypeListBeforeSoften(OpVT, N->getValueType(0), true); in ReplaceNodeResults()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp3462 EVT OpVT = Op.getValueType(); in LowerBITCAST() local
3464 if (useSVEForFixedLengthVectorVT(OpVT)) in LowerBITCAST()
3467 if (OpVT != MVT::f16 && OpVT != MVT::bf16) in LowerBITCAST()
3476 DAG.getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL, OpVT, Op, in LowerBITCAST()
10339 EVT OpVT = Op.getOperand(0).getValueType(); in LowerTRUNCATE() local
10340 SDValue Zero = DAG.getConstant(0, dl, OpVT); in LowerTRUNCATE()
10341 SDValue One = DAG.getConstant(1, dl, OpVT); in LowerTRUNCATE()
10342 SDValue And = DAG.getNode(ISD::AND, dl, OpVT, Op.getOperand(0), One); in LowerTRUNCATE()
17761 EVT OpVT = Op.getValueType(); in LowerPredReductionToSVE() local
17764 if (!OpVT.isScalableVector() || OpVT.getVectorElementType() != MVT::i1) in LowerPredReductionToSVE()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp5743 EVT OpVT = (VT == MVT::f32) ? MVT::v2i32 : MVT::v1i64; in LowerFCOPYSIGN() local
5745 Mask = DAG.getNode(ARMISD::VSHLIMM, dl, OpVT, in LowerFCOPYSIGN()
5746 DAG.getNode(ISD::BITCAST, dl, OpVT, Mask), in LowerFCOPYSIGN()
5753 Tmp1 = DAG.getNode(ARMISD::VSHLIMM, dl, OpVT, in LowerFCOPYSIGN()
5754 DAG.getNode(ISD::BITCAST, dl, OpVT, Tmp1), in LowerFCOPYSIGN()
5760 Tmp0 = DAG.getNode(ISD::BITCAST, dl, OpVT, Tmp0); in LowerFCOPYSIGN()
5761 Tmp1 = DAG.getNode(ISD::BITCAST, dl, OpVT, Tmp1); in LowerFCOPYSIGN()
5766 SDValue MaskNot = DAG.getNode(ISD::XOR, dl, OpVT, Mask, in LowerFCOPYSIGN()
5767 DAG.getNode(ISD::BITCAST, dl, OpVT, AllOnes)); in LowerFCOPYSIGN()
5769 SDValue Res = DAG.getNode(ISD::OR, dl, OpVT, in LowerFCOPYSIGN()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/utils/TableGen/
H A DCodeGenDAGPatterns.cpp2485 MVT::SimpleValueType OpVT = Int->IS.ParamVTs[i]; in ApplyTypeConstraints() local
2487 MadeChange |= getChild(i+1)->UpdateNodeType(0, OpVT, TP); in ApplyTypeConstraints()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp5765 EVT OpVT = Op.getValueType(); in combineExtract() local
5766 unsigned OpBytesPerElement = OpVT.getVectorElementType().getStoreSize(); in combineExtract()
5795 EVT OpVT = Op.getOperand(0).getValueType(); in combineExtract() local
5797 unsigned OpBytesPerElement = OpVT.getVectorElementType().getStoreSize(); in combineExtract()

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