| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64StorePairSuppress.cpp | 152 bool OffsetIsScalable; in runOnMachineFunction() local
153 if (TII->getMemOperandWithOffset(MI, BaseOp, Offset, OffsetIsScalable, in runOnMachineFunction()
|
| H A D | AArch64InstrInfo.h | 129 int64_t &Offset, bool &OffsetIsScalable, unsigned &Width,
138 int64_t &Offset, bool &OffsetIsScalable,
|
| H A D | AArch64InstrInfo.cpp | 2515 int64_t &Offset, bool &OffsetIsScalable, unsigned &Width, in getMemOperandsWithOffsetWidth() argument
2521 if (!getMemOperandWithOffsetWidth(LdSt, BaseOp, Offset, OffsetIsScalable, in getMemOperandsWithOffsetWidth()
2533 bool OffsetIsScalable; in getAddrModeFromMemoryOp() local
2534 if (!getMemOperandWithOffset(MemI, Base, Offset, OffsetIsScalable, TRI)) in getAddrModeFromMemoryOp()
2548 bool &OffsetIsScalable, unsigned &Width, in getMemOperandWithOffsetWidth() argument
2586 OffsetIsScalable = Scale.isScalable(); in getMemOperandWithOffsetWidth()
6613 bool OffsetIsScalable; in getOutliningCandidateInfo() local
6617 if (!getMemOperandWithOffset(MI, Base, Offset, OffsetIsScalable, &TRI) || in getOutliningCandidateInfo()
6622 if (OffsetIsScalable) in getOutliningCandidateInfo()
7088 bool OffsetIsScalable; in fixupPostOutline() local
[all …]
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | TargetInstrInfo.cpp | 1073 bool &OffsetIsScalable, const TargetRegisterInfo *TRI) const { in getMemOperandWithOffset() argument
1076 if (!getMemOperandsWithOffsetWidth(MI, BaseOps, Offset, OffsetIsScalable, in getMemOperandWithOffset()
1181 bool OffsetIsScalable; in describeLoadedValue() local
1225 if (!TII->getMemOperandWithOffset(MI, BaseOp, Offset, OffsetIsScalable, in describeLoadedValue()
1230 if (OffsetIsScalable) in describeLoadedValue()
|
| H A D | MachineSink.cpp | 1009 bool OffsetIsScalable; in SinkingPreventsImplicitNullCheck() local
1010 if (!TII->getMemOperandWithOffset(MI, BaseOp, Offset, OffsetIsScalable, TRI)) in SinkingPreventsImplicitNullCheck()
|
| H A D | ModuloSchedule.cpp | 915 bool OffsetIsScalable; in computeDelta() local
916 if (!TII->getMemOperandWithOffset(MI, BaseOp, Offset, OffsetIsScalable, TRI)) in computeDelta()
920 if (OffsetIsScalable) in computeDelta()
|
| H A D | MachinePipeliner.cpp | 2129 bool OffsetIsScalable; in computeDelta() local
2130 if (!TII->getMemOperandWithOffset(MI, BaseOp, Offset, OffsetIsScalable, TRI)) in computeDelta()
2134 if (OffsetIsScalable) in computeDelta()
|
| H A D | MachineScheduler.cpp | 1691 bool OffsetIsScalable; in collectMemOpRecords() local
1694 OffsetIsScalable, Width, TRI)) { in collectMemOpRecords()
1698 << Offset << ", OffsetIsScalable: " << OffsetIsScalable in collectMemOpRecords()
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/ |
| H A D | LanaiInstrInfo.h | 73 bool &OffsetIsScalable, unsigned &Width,
|
| H A D | LanaiInstrInfo.cpp | 800 int64_t &Offset, bool &OffsetIsScalable, unsigned &Width, in getMemOperandsWithOffsetWidth() argument
815 OffsetIsScalable = false; in getMemOperandsWithOffsetWidth()
|
| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | TargetInstrInfo.h | 1321 bool &OffsetIsScalable,
1333 int64_t &Offset, bool &OffsetIsScalable, unsigned &Width, in getMemOperandsWithOffsetWidth() argument
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonInstrInfo.h | 210 bool &OffsetIsScalable, unsigned &Width,
|
| H A D | HexagonInstrInfo.cpp | 2975 int64_t &Offset, bool &OffsetIsScalable, unsigned &Width, in getMemOperandsWithOffsetWidth() argument
2977 OffsetIsScalable = false; in getMemOperandsWithOffsetWidth()
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.h | 334 bool &OffsetIsScalable, unsigned &Width,
|
| H A D | X86InstrInfo.cpp | 3737 int64_t &Offset, bool &OffsetIsScalable, unsigned &Width, in getMemOperandsWithOffsetWidth() argument
3769 OffsetIsScalable = false; in getMemOperandsWithOffsetWidth()
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.h | 542 bool &OffsetIsScalable, unsigned &Width,
|
| H A D | PPCInstrInfo.cpp | 2738 int64_t &Offset, bool &OffsetIsScalable, unsigned &Width, in getMemOperandsWithOffsetWidth() argument
2741 OffsetIsScalable = false; in getMemOperandsWithOffsetWidth()
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | SIMachineScheduler.cpp | 1934 bool OffsetIsScalable; in schedule() local
1936 OffsetIsScalable, TRI)) in schedule()
|
| H A D | SIInstrInfo.h | 191 bool &OffsetIsScalable, unsigned &Width,
|
| H A D | SIInstrInfo.cpp | 246 int64_t &Offset, bool &OffsetIsScalable, unsigned &Width, in getMemOperandsWithOffsetWidth() argument
252 OffsetIsScalable = false; in getMemOperandsWithOffsetWidth()
|